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authorJoshua Drake <joshua.ellis.drake@gmail.com>2023-10-23 22:03:35 -0500
committerJoshua Drake <joshua.ellis.drake@gmail.com>2023-10-23 22:03:35 -0500
commitfd3c54b7f50036e3e318a1485bc87b6a29e2acd5 (patch)
tree306c23ddc1c8a20311216ef54ad5d1bec3af305b /Resistor Bank Control Board.kicad_prl
parent6fee9858ded624b42b66db8a010179c5acb2d1b8 (diff)
Finished PCB design with new ICs.
Diffstat (limited to 'Resistor Bank Control Board.kicad_prl')
-rw-r--r--Resistor Bank Control Board.kicad_prl24
1 files changed, 12 insertions, 12 deletions
diff --git a/Resistor Bank Control Board.kicad_prl b/Resistor Bank Control Board.kicad_prl
index 43b8bc3..21ae0b2 100644
--- a/Resistor Bank Control Board.kicad_prl
+++ b/Resistor Bank Control Board.kicad_prl
@@ -1,7 +1,7 @@
{
"board": {
- "active_layer": 0,
- "active_layer_preset": "All Layers",
+ "active_layer": 37,
+ "active_layer_preset": "",
"auto_track_width": true,
"hidden_netclasses": [],
"hidden_nets": [],
@@ -15,17 +15,17 @@
"zones": 0.6
},
"selection_filter": {
- "dimensions": true,
- "footprints": true,
- "graphics": true,
- "keepouts": true,
+ "dimensions": false,
+ "footprints": false,
+ "graphics": false,
+ "keepouts": false,
"lockedItems": false,
- "otherItems": true,
- "pads": true,
- "text": true,
+ "otherItems": false,
+ "pads": false,
+ "text": false,
"tracks": true,
- "vias": true,
- "zones": true
+ "vias": false,
+ "zones": false
},
"visible_items": [
0,
@@ -64,7 +64,7 @@
39,
40
],
- "visible_layers": "fffffff_ffffffff",
+ "visible_layers": "ff7ffff_ffffffff",
"zone_display_mode": 0
},
"meta": {