From fd3c54b7f50036e3e318a1485bc87b6a29e2acd5 Mon Sep 17 00:00:00 2001 From: Joshua Drake Date: Mon, 23 Oct 2023 22:03:35 -0500 Subject: Finished PCB design with new ICs. --- Resistor Bank Control Board.kicad_prl | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) (limited to 'Resistor Bank Control Board.kicad_prl') diff --git a/Resistor Bank Control Board.kicad_prl b/Resistor Bank Control Board.kicad_prl index 43b8bc3..21ae0b2 100644 --- a/Resistor Bank Control Board.kicad_prl +++ b/Resistor Bank Control Board.kicad_prl @@ -1,7 +1,7 @@ { "board": { - "active_layer": 0, - "active_layer_preset": "All Layers", + "active_layer": 37, + "active_layer_preset": "", "auto_track_width": true, "hidden_netclasses": [], "hidden_nets": [], @@ -15,17 +15,17 @@ "zones": 0.6 }, "selection_filter": { - "dimensions": true, - "footprints": true, - "graphics": true, - "keepouts": true, + "dimensions": false, + "footprints": false, + "graphics": false, + "keepouts": false, "lockedItems": false, - "otherItems": true, - "pads": true, - "text": true, + "otherItems": false, + "pads": false, + "text": false, "tracks": true, - "vias": true, - "zones": true + "vias": false, + "zones": false }, "visible_items": [ 0, @@ -64,7 +64,7 @@ 39, 40 ], - "visible_layers": "fffffff_ffffffff", + "visible_layers": "ff7ffff_ffffffff", "zone_display_mode": 0 }, "meta": { -- cgit v1.2.3