diff options
Diffstat (limited to 'mcc_generated_files/system/src')
| -rw-r--r-- | mcc_generated_files/system/src/clock.c | 105 | ||||
| -rw-r--r-- | mcc_generated_files/system/src/config_bits.c | 50 | ||||
| -rw-r--r-- | mcc_generated_files/system/src/interrupt.c | 53 | ||||
| -rw-r--r-- | mcc_generated_files/system/src/pins.c | 393 | ||||
| -rw-r--r-- | mcc_generated_files/system/src/protected_io.S | 90 | ||||
| -rw-r--r-- | mcc_generated_files/system/src/syscfg.c | 64 | ||||
| -rw-r--r-- | mcc_generated_files/system/src/system.c | 47 |
7 files changed, 802 insertions, 0 deletions
diff --git a/mcc_generated_files/system/src/clock.c b/mcc_generated_files/system/src/clock.c new file mode 100644 index 0000000..08efbea --- /dev/null +++ b/mcc_generated_files/system/src/clock.c @@ -0,0 +1,105 @@ +
+
+/**
+ * CLKCTRL Generated Driver File
+ *
+ * @file clkctrl.c
+ *
+ * @ingroup clkctrl
+ *
+ * @brief This file contains the driver code for CLKCTRL module.
+ *
+ * version CLKCTRL Driver Version 1.1.4
+ *
+ * @version Package Version 2.0.10
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+
+#include "../clock.h"
+
+void CLOCK_Initialize(void)
+{
+ ccp_write_io((void*)&(CLKCTRL.MCLKCTRLA),(1 << CLKCTRL_CLKOUT_bp) // CLKOUT enabled
+ | CLKCTRL_CLKSEL_EXTCLK_gc // CLKSEL External clock
+ );
+ ccp_write_io((void*)&(CLKCTRL.MCLKCTRLB),CLKCTRL_PDIV_DIV2_gc // PDIV Divide by 2
+ | (0 << CLKCTRL_PEN_bp) // PEN disabled
+ );
+ ccp_write_io((void*)&(CLKCTRL.OSC32KCTRLA),(0 << CLKCTRL_RUNSTDBY_bp) // RUNSTDBY disabled
+ );
+ ccp_write_io((void*)&(CLKCTRL.OSCHFCTRLA),CLKCTRL_AUTOTUNE_OFF_gc // AUTOTUNE OFF
+ | CLKCTRL_FRQSEL_4M_gc // FRQSEL 4 MHz system clock (default)
+ | (0 << CLKCTRL_RUNSTDBY_bp) // RUNSTDBY disabled
+ | CLKCTRL_ALGSEL_BIN_gc // ALGSEL BIN
+ );
+ ccp_write_io((void*)&(CLKCTRL.OSCHFTUNE),0x0 // TUNE 0x0
+ );
+
+ ccp_write_io((void*)&(CLKCTRL.XOSC32KCTRLA),CLKCTRL_CSUT_1K_gc // CSUT 1k cycles
+ | (0 << CLKCTRL_ENABLE_bp) // ENABLE disabled
+ | (0 << CLKCTRL_LPMODE_bp) // LPMODE disabled
+ | (0 << CLKCTRL_RUNSTDBY_bp) // RUNSTDBY disabled
+ | CLKCTRL_SEL_XTAL_gc // SEL XTAL
+ );
+ ccp_write_io((void*)&(CLKCTRL.MCLKCTRLC),(0 << CLKCTRL_CFDEN_bp) // CFDEN disabled
+ | CLKCTRL_CFDSRC_XOSCHF_gc // CFDSRC XOSCHF
+ | (0 << CLKCTRL_CFDTST_bp) // CFDTST disabled
+ );
+ ccp_write_io((void*)&(CLKCTRL.MCLKINTCTRL),(0 << CLKCTRL_CFD_bp) // CFD disabled
+ | CLKCTRL_INTTYPE_INT_gc // INTTYPE INT
+ );
+ ccp_write_io((void*)&(CLKCTRL.MCLKINTFLAGS),(0 << CLKCTRL_CFD_bp) // CFD disabled
+ );
+ ccp_write_io((void*)&(CLKCTRL.XOSCHFCTRLA),CLKCTRL_CSUTHF_256_gc // CSUTHF 256
+ | (1 << CLKCTRL_ENABLE_bp) // ENABLE enabled
+ | CLKCTRL_FRQRANGE_24M_gc // FRQRANGE 24M
+ | (1 << CLKCTRL_RUNSTBY_bp) // RUNSTBY enabled
+ | CLKCTRL_SELHF_XTAL_gc // SELHF XTAL
+ );
+
+ ccp_write_io((void*)&(CLKCTRL.MCLKTIMEBASE),0x18 // TIMEBASE 24
+ );
+
+ // System clock stability check by polling the status register.
+ while(!(CLKCTRL.MCLKSTATUS & CLKCTRL_EXTS_bm))
+ {
+ }
+
+}
+
+void CFD_Enable(CLKCTRL_CFDSRC_t cfd_source)
+{
+ /* Enable Clock Failure Detection on main clock */
+ ccp_write_io((uint8_t *) & CLKCTRL.MCLKCTRLC, cfd_source | CLKCTRL_CFDEN_bm);
+}
+
+void CFD_Disable(void)
+{
+ /* Disable Clock Failure Detection on main clock */
+ ccp_write_io((uint8_t *) & CLKCTRL.MCLKCTRLC, CLKCTRL.MCLKCTRLC & ~CLKCTRL_CFDEN_bm);
+}
+
+
+/**
+ End of File
+*/
\ No newline at end of file diff --git a/mcc_generated_files/system/src/config_bits.c b/mcc_generated_files/system/src/config_bits.c new file mode 100644 index 0000000..44dd4ce --- /dev/null +++ b/mcc_generated_files/system/src/config_bits.c @@ -0,0 +1,50 @@ +/**
+ * CONFIGURATION BITS Generated Driver Source File
+ *
+ * @file config_bits.c
+ *
+ * @ingroup config_bitsdriver
+ *
+ * @brief This file contains the API implementation for the Device Configuration Bits driver.
+ *
+ * @version Driver Version 1.0.5
+ *
+ * @version Package Version 4.3.0
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+#include <avr/io.h>
+
+/**
+ * Configures the Fuse bits.
+ */
+FUSES =
+{
+ .BODCFG = ACTIVE_DISABLE_gc | LVL_BODLEVEL0_gc | SAMPFREQ_128Hz_gc | SLEEP_DISABLE_gc,
+ .BOOTSIZE = 0x0,
+ .CODESIZE = 0x0,
+ .OSCCFG = CLKSEL_OSCHF_gc,
+ .PDICFG = KEY_NOTACT_gc | LEVEL_BASIC_gc,
+ .SYSCFG0 = CRCSEL_CRC16_gc | CRCSRC_NOCRC_gc | RSTPINCFG_RST_gc | UPDIPINCFG_UPDI_gc,
+ .SYSCFG1 = SUT_0MS_gc | USBSINK_ENABLE_gc,
+ .WDTCFG = PERIOD_OFF_gc | WINDOW_OFF_gc,
+};
diff --git a/mcc_generated_files/system/src/interrupt.c b/mcc_generated_files/system/src/interrupt.c new file mode 100644 index 0000000..aeb81e6 --- /dev/null +++ b/mcc_generated_files/system/src/interrupt.c @@ -0,0 +1,53 @@ +/**
+ * Interrupt Manager Generated Driver File.
+ *
+ * @file interrupt.c
+ *
+ * @ingroup interrupt
+ *
+ * @brief This file contains the API implementation for the Interrupt Manager.
+ *
+ * @version Interrupt Manager Driver Version 1.0.0
+*/
+
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+
+#include "../interrupt.h"
+
+int8_t CPUINT_Initialize()
+{
+ /* IVSEL and CVT are Configuration Change Protected */
+
+ //CVT disabled; IVSEL disabled; LVL0RR disabled;
+ ccp_write_io((void*)&(CPUINT.CTRLA),0x0);
+
+ //LVL0PRI 0;
+ CPUINT.LVL0PRI = 0x0;
+
+ //LVL1VEC 0;
+ CPUINT.LVL1VEC = 0x0;
+
+ ENABLE_INTERRUPTS();
+
+ return 0;
+}
\ No newline at end of file diff --git a/mcc_generated_files/system/src/pins.c b/mcc_generated_files/system/src/pins.c new file mode 100644 index 0000000..92133c9 --- /dev/null +++ b/mcc_generated_files/system/src/pins.c @@ -0,0 +1,393 @@ +/**
+ * Generated Driver File
+ *
+ * @file pins.c
+ *
+ * @ingroup pinsdriver
+ *
+ * @brief This is generated driver implementation for pins.
+ * This file provides implementations for pin APIs for all pins selected in the GUI.
+ *
+ * @version Driver Version 1.1.0
+*/
+
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+#include "../pins.h"
+
+static void (*IO_PA5_InterruptHandler)(void);
+static void (*IO_PA4_InterruptHandler)(void);
+static void (*IO_PA6_InterruptHandler)(void);
+static void (*IO_PA7_InterruptHandler)(void);
+static void (*IO_PA2_InterruptHandler)(void);
+static void (*IO_PA3_InterruptHandler)(void);
+static void (*IO_PD0_InterruptHandler)(void);
+static void (*IO_PD1_InterruptHandler)(void);
+static void (*IO_PD2_InterruptHandler)(void);
+static void (*IO_PD3_InterruptHandler)(void);
+static void (*IO_PD4_InterruptHandler)(void);
+static void (*IO_PD5_InterruptHandler)(void);
+static void (*IO_PD6_InterruptHandler)(void);
+static void (*IO_PD7_InterruptHandler)(void);
+
+void PIN_MANAGER_Initialize()
+{
+
+ /* OUT Registers Initialization */
+ PORTA.OUT = 0x0;
+ PORTC.OUT = 0x0;
+ PORTD.OUT = 0x0;
+ PORTF.OUT = 0x0;
+
+ /* DIR Registers Initialization */
+ PORTA.DIR = 0xDC;
+ PORTC.DIR = 0x0;
+ PORTD.DIR = 0xFF;
+ PORTF.DIR = 0x0;
+
+ /* PINxCTRL registers Initialization */
+ PORTA.PIN0CTRL = 0x0;
+ PORTA.PIN1CTRL = 0x0;
+ PORTA.PIN2CTRL = 0x0;
+ PORTA.PIN3CTRL = 0x0;
+ PORTA.PIN4CTRL = 0x0;
+ PORTA.PIN5CTRL = 0x0;
+ PORTA.PIN6CTRL = 0x0;
+ PORTA.PIN7CTRL = 0x0;
+ PORTC.PIN0CTRL = 0x0;
+ PORTC.PIN1CTRL = 0x0;
+ PORTC.PIN2CTRL = 0x0;
+ PORTC.PIN3CTRL = 0x0;
+ PORTC.PIN4CTRL = 0x0;
+ PORTC.PIN5CTRL = 0x0;
+ PORTC.PIN6CTRL = 0x0;
+ PORTC.PIN7CTRL = 0x0;
+ PORTD.PIN0CTRL = 0x0;
+ PORTD.PIN1CTRL = 0x0;
+ PORTD.PIN2CTRL = 0x0;
+ PORTD.PIN3CTRL = 0x0;
+ PORTD.PIN4CTRL = 0x0;
+ PORTD.PIN5CTRL = 0x0;
+ PORTD.PIN6CTRL = 0x0;
+ PORTD.PIN7CTRL = 0x0;
+ PORTF.PIN0CTRL = 0x0;
+ PORTF.PIN1CTRL = 0x0;
+ PORTF.PIN2CTRL = 0x0;
+ PORTF.PIN3CTRL = 0x0;
+ PORTF.PIN4CTRL = 0x0;
+ PORTF.PIN5CTRL = 0x0;
+ PORTF.PIN6CTRL = 0x0;
+ PORTF.PIN7CTRL = 0x0;
+
+ /* PORTMUX Initialization */
+ PORTMUX.CCLROUTEA = 0x0;
+ PORTMUX.EVSYSROUTEA = 0x0;
+ PORTMUX.SPIROUTEA = 0x0;
+ PORTMUX.TCAROUTEA = 0x0;
+ PORTMUX.TCBROUTEA = 0x0;
+ PORTMUX.TWIROUTEA = 0x0;
+ PORTMUX.USARTROUTEA = 0x0;
+
+ // register default ISC callback functions at runtime; use these methods to register a custom function
+ IO_PA5_SetInterruptHandler(IO_PA5_DefaultInterruptHandler);
+ IO_PA4_SetInterruptHandler(IO_PA4_DefaultInterruptHandler);
+ IO_PA6_SetInterruptHandler(IO_PA6_DefaultInterruptHandler);
+ IO_PA7_SetInterruptHandler(IO_PA7_DefaultInterruptHandler);
+ IO_PA2_SetInterruptHandler(IO_PA2_DefaultInterruptHandler);
+ IO_PA3_SetInterruptHandler(IO_PA3_DefaultInterruptHandler);
+ IO_PD0_SetInterruptHandler(IO_PD0_DefaultInterruptHandler);
+ IO_PD1_SetInterruptHandler(IO_PD1_DefaultInterruptHandler);
+ IO_PD2_SetInterruptHandler(IO_PD2_DefaultInterruptHandler);
+ IO_PD3_SetInterruptHandler(IO_PD3_DefaultInterruptHandler);
+ IO_PD4_SetInterruptHandler(IO_PD4_DefaultInterruptHandler);
+ IO_PD5_SetInterruptHandler(IO_PD5_DefaultInterruptHandler);
+ IO_PD6_SetInterruptHandler(IO_PD6_DefaultInterruptHandler);
+ IO_PD7_SetInterruptHandler(IO_PD7_DefaultInterruptHandler);
+}
+
+/**
+ Allows selecting an interrupt handler for IO_PA5 at application runtime
+*/
+void IO_PA5_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PA5_InterruptHandler = interruptHandler;
+}
+
+void IO_PA5_DefaultInterruptHandler(void)
+{
+ // add your IO_PA5 interrupt custom code
+ // or set custom function using IO_PA5_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PA4 at application runtime
+*/
+void IO_PA4_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PA4_InterruptHandler = interruptHandler;
+}
+
+void IO_PA4_DefaultInterruptHandler(void)
+{
+ // add your IO_PA4 interrupt custom code
+ // or set custom function using IO_PA4_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PA6 at application runtime
+*/
+void IO_PA6_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PA6_InterruptHandler = interruptHandler;
+}
+
+void IO_PA6_DefaultInterruptHandler(void)
+{
+ // add your IO_PA6 interrupt custom code
+ // or set custom function using IO_PA6_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PA7 at application runtime
+*/
+void IO_PA7_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PA7_InterruptHandler = interruptHandler;
+}
+
+void IO_PA7_DefaultInterruptHandler(void)
+{
+ // add your IO_PA7 interrupt custom code
+ // or set custom function using IO_PA7_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PA2 at application runtime
+*/
+void IO_PA2_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PA2_InterruptHandler = interruptHandler;
+}
+
+void IO_PA2_DefaultInterruptHandler(void)
+{
+ // add your IO_PA2 interrupt custom code
+ // or set custom function using IO_PA2_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PA3 at application runtime
+*/
+void IO_PA3_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PA3_InterruptHandler = interruptHandler;
+}
+
+void IO_PA3_DefaultInterruptHandler(void)
+{
+ // add your IO_PA3 interrupt custom code
+ // or set custom function using IO_PA3_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PD0 at application runtime
+*/
+void IO_PD0_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PD0_InterruptHandler = interruptHandler;
+}
+
+void IO_PD0_DefaultInterruptHandler(void)
+{
+ // add your IO_PD0 interrupt custom code
+ // or set custom function using IO_PD0_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PD1 at application runtime
+*/
+void IO_PD1_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PD1_InterruptHandler = interruptHandler;
+}
+
+void IO_PD1_DefaultInterruptHandler(void)
+{
+ // add your IO_PD1 interrupt custom code
+ // or set custom function using IO_PD1_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PD2 at application runtime
+*/
+void IO_PD2_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PD2_InterruptHandler = interruptHandler;
+}
+
+void IO_PD2_DefaultInterruptHandler(void)
+{
+ // add your IO_PD2 interrupt custom code
+ // or set custom function using IO_PD2_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PD3 at application runtime
+*/
+void IO_PD3_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PD3_InterruptHandler = interruptHandler;
+}
+
+void IO_PD3_DefaultInterruptHandler(void)
+{
+ // add your IO_PD3 interrupt custom code
+ // or set custom function using IO_PD3_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PD4 at application runtime
+*/
+void IO_PD4_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PD4_InterruptHandler = interruptHandler;
+}
+
+void IO_PD4_DefaultInterruptHandler(void)
+{
+ // add your IO_PD4 interrupt custom code
+ // or set custom function using IO_PD4_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PD5 at application runtime
+*/
+void IO_PD5_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PD5_InterruptHandler = interruptHandler;
+}
+
+void IO_PD5_DefaultInterruptHandler(void)
+{
+ // add your IO_PD5 interrupt custom code
+ // or set custom function using IO_PD5_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PD6 at application runtime
+*/
+void IO_PD6_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PD6_InterruptHandler = interruptHandler;
+}
+
+void IO_PD6_DefaultInterruptHandler(void)
+{
+ // add your IO_PD6 interrupt custom code
+ // or set custom function using IO_PD6_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PD7 at application runtime
+*/
+void IO_PD7_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PD7_InterruptHandler = interruptHandler;
+}
+
+void IO_PD7_DefaultInterruptHandler(void)
+{
+ // add your IO_PD7 interrupt custom code
+ // or set custom function using IO_PD7_SetInterruptHandler()
+}
+ISR(PORTA_PORT_vect)
+{
+ // Call the interrupt handler for the callback registered at runtime
+ if(VPORTA.INTFLAGS & PORT_INT5_bm)
+ {
+ IO_PA5_InterruptHandler();
+ }
+ if(VPORTA.INTFLAGS & PORT_INT4_bm)
+ {
+ IO_PA4_InterruptHandler();
+ }
+ if(VPORTA.INTFLAGS & PORT_INT6_bm)
+ {
+ IO_PA6_InterruptHandler();
+ }
+ if(VPORTA.INTFLAGS & PORT_INT7_bm)
+ {
+ IO_PA7_InterruptHandler();
+ }
+ if(VPORTA.INTFLAGS & PORT_INT2_bm)
+ {
+ IO_PA2_InterruptHandler();
+ }
+ if(VPORTA.INTFLAGS & PORT_INT3_bm)
+ {
+ IO_PA3_InterruptHandler();
+ }
+ /* Clear interrupt flags */
+ VPORTA.INTFLAGS = 0xff;
+}
+
+ISR(PORTC_PORT_vect)
+{
+ /* Clear interrupt flags */
+ VPORTC.INTFLAGS = 0xff;
+}
+
+ISR(PORTD_PORT_vect)
+{
+ // Call the interrupt handler for the callback registered at runtime
+ if(VPORTD.INTFLAGS & PORT_INT0_bm)
+ {
+ IO_PD0_InterruptHandler();
+ }
+ if(VPORTD.INTFLAGS & PORT_INT1_bm)
+ {
+ IO_PD1_InterruptHandler();
+ }
+ if(VPORTD.INTFLAGS & PORT_INT2_bm)
+ {
+ IO_PD2_InterruptHandler();
+ }
+ if(VPORTD.INTFLAGS & PORT_INT3_bm)
+ {
+ IO_PD3_InterruptHandler();
+ }
+ if(VPORTD.INTFLAGS & PORT_INT4_bm)
+ {
+ IO_PD4_InterruptHandler();
+ }
+ if(VPORTD.INTFLAGS & PORT_INT5_bm)
+ {
+ IO_PD5_InterruptHandler();
+ }
+ if(VPORTD.INTFLAGS & PORT_INT6_bm)
+ {
+ IO_PD6_InterruptHandler();
+ }
+ if(VPORTD.INTFLAGS & PORT_INT7_bm)
+ {
+ IO_PD7_InterruptHandler();
+ }
+ /* Clear interrupt flags */
+ VPORTD.INTFLAGS = 0xff;
+}
+
+ISR(PORTF_PORT_vect)
+{
+ /* Clear interrupt flags */
+ VPORTF.INTFLAGS = 0xff;
+}
+
+/**
+ End of File
+*/
\ No newline at end of file diff --git a/mcc_generated_files/system/src/protected_io.S b/mcc_generated_files/system/src/protected_io.S new file mode 100644 index 0000000..4a60008 --- /dev/null +++ b/mcc_generated_files/system/src/protected_io.S @@ -0,0 +1,90 @@ +/**
+ * protected_io Source Code File
+ *
+ * @file protected_io.S
+ *
+ * @ingroup config_bitsdriver
+ *
+ * @brief This file contains the generated protected_io source code file for the CONFIGURATION BITS.
+ *
+ * @version Driver Version 1.0.0
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+
+#include "../utils/assembler.h"
+
+/*
+ * GNU and IAR use different calling conventions. Since this is
+ * a very small and simple function to begin with, it's easier
+ * to implement it twice than to deal with the differences
+ * within a single implementation.
+ */
+
+ PUBLIC_FUNCTION(protected_write_io)
+
+#if defined(__GNUC__)
+
+#ifdef RAMPZ
+ out _SFR_IO_ADDR(RAMPZ), r1 // Clear bits 23:16 of Z
+#endif
+ movw r30, r24 // Load addr into Z
+ out CCP, r22 // Start CCP handshake
+ st Z, r20 // Write value to I/O register
+ ret // Return to caller
+
+#elif defined(__IAR_SYSTEMS_ASM__)
+
+# if !defined(CONFIG_MEMORY_MODEL_TINY) && !defined(CONFIG_MEMORY_MODEL_SMALL) \
+ && !defined(CONFIG_MEMORY_MODEL_LARGE)
+# define CONFIG_MEMORY_MODEL_SMALL
+# endif
+# if defined(CONFIG_MEMORY_MODEL_LARGE)
+ ldi r20, 0
+ out RAMPZ, r20 // Reset bits 23:16 of Z
+ movw r30, r16 // Load addr into Z
+# elif defined(CONFIG_MEMORY_MODEL_TINY)
+ ldi r31, 0 // Reset bits 8:15 of Z
+ mov r30, r16 // Load addr into Z
+# else
+ movw r30, r16 // Load addr into Z
+# endif
+# if defined(CONFIG_MEMORY_MODEL_TINY)
+ out CCP, r17 // Start CCP handshake
+ st Z, r18 // Write value to I/O register
+# elif defined(CONFIG_MEMORY_MODEL_SMALL)
+ out CCP, r18 // Start CCP handshake
+ st Z, r19 // Write value to I/O register
+# elif defined(CONFIG_MEMORY_MODEL_LARGE)
+ out CCP, r19 // Start CCP handshake
+ st Z, r20 // Write value to I/O register
+# else
+# error Unknown memory model in use, no idea how registers should be accessed
+# endif
+ ret
+#else
+# error Unknown assembler
+#endif
+
+ END_FUNC(protected_write_io)
+ END_FILE()
+
diff --git a/mcc_generated_files/system/src/syscfg.c b/mcc_generated_files/system/src/syscfg.c new file mode 100644 index 0000000..ce8bc01 --- /dev/null +++ b/mcc_generated_files/system/src/syscfg.c @@ -0,0 +1,64 @@ +
+/**
+ * SYSCFG Generated Driver File
+ *
+ * @file syscfg.c
+ *
+ * @ingroup syscfg
+ *
+ * @brief This is the generated driver implementation file for the SYSCFG driver.
+ *
+ * @version SYSCFG Driver Version 1.0.0
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+/**
+ Section: Included Files
+*/
+
+#include "../../system/utils/compiler.h"
+#include "../syscfg.h"
+
+/**
+ Section: SYSCFG APIs
+*/
+
+void SYSCFG_Initialize(void)
+{
+ SYSCFG.VUSBCTRL = (1 << SYSCFG_USBVREG_bp); // USBVREG ENABLE;
+}
+uint8_t SYSCFG_GetRevId(void)
+{
+ return SYSCFG.REVID;
+}
+inline void SYSCFG_UsbVregEnable(void)
+{
+ SYSCFG.VUSBCTRL = SYSCFG_USBVREG_bm;
+}
+inline void SYSCFG_UsbVregDisable(void)
+{
+ SYSCFG.VUSBCTRL = ~SYSCFG_USBVREG_bm;
+}
+
+/**
+ End of File
+*/
\ No newline at end of file diff --git a/mcc_generated_files/system/src/system.c b/mcc_generated_files/system/src/system.c new file mode 100644 index 0000000..12217fb --- /dev/null +++ b/mcc_generated_files/system/src/system.c @@ -0,0 +1,47 @@ +/**
+ * System Driver Source File
+ *
+ * @file system.c
+ *
+ * @ingroup systemdriver
+ *
+ * @brief This file contains the API implementation for the System driver.
+ *
+ * @version Driver Version 1.0.3
+ *
+ * @version Package Version 4.3.0
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+#include "../system.h"
+
+void SYSTEM_Initialize(void)
+{
+ CLOCK_Initialize();
+ SYSCFG_Initialize();
+ PIN_MANAGER_Initialize();
+ SPI0_Initialize();
+ USB0_Initialize();
+ USBDevice_Initialize();
+ CPUINT_Initialize();
+}
+
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