diff options
| author | Joshua Drake <joshua.ellis.drake@gmail.com> | 2025-12-06 14:22:21 -0600 |
|---|---|---|
| committer | Joshua Drake <joshua.ellis.drake@gmail.com> | 2025-12-06 14:22:21 -0600 |
| commit | c9335332df86fbc895a8868a34abcc98817d53f0 (patch) | |
| tree | efd0443368c077cbe6215908ae91bf076625e107 /mcc_generated_files/system | |
Diffstat (limited to 'mcc_generated_files/system')
24 files changed, 3416 insertions, 0 deletions
diff --git a/mcc_generated_files/system/ccp.h b/mcc_generated_files/system/ccp.h new file mode 100644 index 0000000..b6d9e0f --- /dev/null +++ b/mcc_generated_files/system/ccp.h @@ -0,0 +1,72 @@ +/**
+ * CCP Header File
+ *
+ * @file ccp.h
+ *
+ * @ingroup config_bitsdriver
+ *
+ * @brief This file contains the Configuration Change Protection (CCP) header file for the Configuration bits driver.
+ *
+ * @version Driver Version 1.0.0
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+
+#ifndef CPU_CCP_H
+#define CPU_CCP_H
+
+#include "../system/utils/compiler.h"
+#include "../system/protected_io.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Writes to a CCP-protected 8-bit I/O register.
+ * @param addr Address of the I/O register.
+ * @param value Value to be written.
+ * NOTE: Using IAR Embedded workbench, the choice of memory model has an impact on calling convention.
+ * Memory model must be defined in the Assembler preprocessor directives to be visible to the preprocessor.
+ */
+static inline void ccp_write_io(void *addr, uint8_t value)
+{
+ protected_write_io(addr, CCP_IOREG_gc, value);
+}
+
+/**
+ * @brief Writes to a CCP-protected 8-bit SPM register.
+ * @param addr Address of the SPM register.
+ * @param value Value to be written.
+ * NOTE: Using IAR Embedded workbench, the choice of memory model has an impacton calling convention.
+ * Memory model must be defined in the Assembler preprocessor directives to be visible to the preprocessor.
+ */
+static inline void ccp_write_spm(void *addr, uint8_t value)
+{
+ protected_write_io(addr, CCP_SPM_gc, value);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CPU_CCP_H */
diff --git a/mcc_generated_files/system/clock.h b/mcc_generated_files/system/clock.h new file mode 100644 index 0000000..8840a00 --- /dev/null +++ b/mcc_generated_files/system/clock.h @@ -0,0 +1,70 @@ +
+/**
+ * CLKCTRL Generated Driver API Header File
+ *
+ * @file clkctrl.h
+ *
+ * @defgroup clkctrl CLKCTRL
+ *
+ * @brief This header file provides APIs for the CLKCTRL driver.
+ *
+ * @version CLKCTRL Driver Version 1.1.4
+ *
+ * @version Package Version 2.0.10
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+
+#ifndef CLOCK_H
+#define CLOCK_H
+
+#ifndef F_CPU
+#define F_CPU 24000000UL
+#endif
+
+#include "ccp.h"
+
+/**
+ * @ingroup clkctrl
+ * @brief Initializes the CLKCTRL module.
+ * @param None.
+ * @return None.
+ */
+void CLOCK_Initialize(void);
+
+/**
+ * @ingroup clkctrl
+ * @brief Enables the Clock Failure Detection on the main clock.
+ * @param CLKCTRL_CFDSRC_t cfd_source - main clock source for CFD
+ * @return None.
+ */
+void CFD_Enable(CLKCTRL_CFDSRC_t cfd_source);
+
+/**
+ * @ingroup clkctrl
+ * @brief Disables the Clock Failure Detection on the main clock.
+ * @param None.
+ * @return None.
+ */
+void CFD_Disable(void);
+
+#endif // CLOCK_H
\ No newline at end of file diff --git a/mcc_generated_files/system/config_bits.h b/mcc_generated_files/system/config_bits.h new file mode 100644 index 0000000..25fe43a --- /dev/null +++ b/mcc_generated_files/system/config_bits.h @@ -0,0 +1,44 @@ +/**
+ * CONFIGURATION BITS Generated Driver Header File
+ *
+ * @file config_bits.h
+ *
+ * @defgroup config_bitsdriver CONFIGBITS Driver
+ *
+ * @brief This file contains the API Prototypes for the Configuration Bits driver.
+ *
+ * @version Driver Version 1.0.5
+ *
+ * @version Package Version 4.3.0
+*/
+
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+#ifndef CONFIG_BITS_H
+#define CONFIG_BITS_H
+
+#include "../system/clock.h"
+
+#endif //CONFIG_BITS_H
+/**
+ End of File
+*/
\ No newline at end of file diff --git a/mcc_generated_files/system/interrupt.h b/mcc_generated_files/system/interrupt.h new file mode 100644 index 0000000..73ed652 --- /dev/null +++ b/mcc_generated_files/system/interrupt.h @@ -0,0 +1,57 @@ +/**
+ * Interrupt Manager Generated Driver API Header File.
+ *
+ * @file interrupt.h
+ *
+ * @defgroup interrupt INTERRUPT
+ *
+ * @brief This file contains the API prototype for the Interrupt Manager.
+ *
+ * @version Interrupt Manager Driver Version 1.0.0
+*/
+
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+
+#ifndef INTERRUPT_H
+#define INTERRUPT_H
+
+#include "../system/utils/compiler.h"
+#include "ccp.h"
+#include "../system/utils/atomic.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @ingroup interrupt
+ * @brief Initializes the Interrupt module.
+ * @retval 0 - Initialization is successful.
+ */
+int8_t CPUINT_Initialize();
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INTERRUPT_H */
\ No newline at end of file diff --git a/mcc_generated_files/system/pins.h b/mcc_generated_files/system/pins.h new file mode 100644 index 0000000..63292fd --- /dev/null +++ b/mcc_generated_files/system/pins.h @@ -0,0 +1,608 @@ +/**
+ * Generated Pins header File
+ *
+ * @file pins.h
+ *
+ * @defgroup pinsdriver Pins Driver
+ *
+ * @brief This is generated driver header for pins.
+ * This header file provides APIs for all pins selected in the GUI.
+ *
+ * @version Driver Version 1.1.0
+*/
+
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+#ifndef PINS_H_INCLUDED
+#define PINS_H_INCLUDED
+
+#include <avr/io.h>
+#include "./port.h"
+
+//get/set IO_PA5 aliases
+#define IO_PA5_SetHigh() do { PORTA_OUTSET = 0x20; } while(0)
+#define IO_PA5_SetLow() do { PORTA_OUTCLR = 0x20; } while(0)
+#define IO_PA5_Toggle() do { PORTA_OUTTGL = 0x20; } while(0)
+#define IO_PA5_GetValue() (VPORTA.IN & (0x1 << 5))
+#define IO_PA5_SetDigitalInput() do { PORTA_DIRCLR = 0x20; } while(0)
+#define IO_PA5_SetDigitalOutput() do { PORTA_DIRSET = 0x20; } while(0)
+#define IO_PA5_SetPullUp() do { PORTA_PIN5CTRL |= PORT_PULLUPEN_bm; } while(0)
+#define IO_PA5_ResetPullUp() do { PORTA_PIN5CTRL &= ~PORT_PULLUPEN_bm; } while(0)
+#define IO_PA5_SetInverted() do { PORTA_PIN5CTRL |= PORT_INVEN_bm; } while(0)
+#define IO_PA5_ResetInverted() do { PORTA_PIN5CTRL &= ~PORT_INVEN_bm; } while(0)
+#define IO_PA5_DisableInterruptOnChange() do { PORTA.PIN5CTRL = (PORTA.PIN5CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0)
+#define IO_PA5_EnableInterruptForBothEdges() do { PORTA.PIN5CTRL = (PORTA.PIN5CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0)
+#define IO_PA5_EnableInterruptForRisingEdge() do { PORTA.PIN5CTRL = (PORTA.PIN5CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0)
+#define IO_PA5_EnableInterruptForFallingEdge() do { PORTA.PIN5CTRL = (PORTA.PIN5CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0)
+#define IO_PA5_DisableDigitalInputBuffer() do { PORTA.PIN5CTRL = (PORTA.PIN5CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0)
+#define IO_PA5_EnableInterruptForLowLevelSensing() do { PORTA.PIN5CTRL = (PORTA.PIN5CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0)
+#define PA5_SetInterruptHandler IO_PA5_SetInterruptHandler
+
+//get/set IO_PA4 aliases
+#define IO_PA4_SetHigh() do { PORTA_OUTSET = 0x10; } while(0)
+#define IO_PA4_SetLow() do { PORTA_OUTCLR = 0x10; } while(0)
+#define IO_PA4_Toggle() do { PORTA_OUTTGL = 0x10; } while(0)
+#define IO_PA4_GetValue() (VPORTA.IN & (0x1 << 4))
+#define IO_PA4_SetDigitalInput() do { PORTA_DIRCLR = 0x10; } while(0)
+#define IO_PA4_SetDigitalOutput() do { PORTA_DIRSET = 0x10; } while(0)
+#define IO_PA4_SetPullUp() do { PORTA_PIN4CTRL |= PORT_PULLUPEN_bm; } while(0)
+#define IO_PA4_ResetPullUp() do { PORTA_PIN4CTRL &= ~PORT_PULLUPEN_bm; } while(0)
+#define IO_PA4_SetInverted() do { PORTA_PIN4CTRL |= PORT_INVEN_bm; } while(0)
+#define IO_PA4_ResetInverted() do { PORTA_PIN4CTRL &= ~PORT_INVEN_bm; } while(0)
+#define IO_PA4_DisableInterruptOnChange() do { PORTA.PIN4CTRL = (PORTA.PIN4CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0)
+#define IO_PA4_EnableInterruptForBothEdges() do { PORTA.PIN4CTRL = (PORTA.PIN4CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0)
+#define IO_PA4_EnableInterruptForRisingEdge() do { PORTA.PIN4CTRL = (PORTA.PIN4CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0)
+#define IO_PA4_EnableInterruptForFallingEdge() do { PORTA.PIN4CTRL = (PORTA.PIN4CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0)
+#define IO_PA4_DisableDigitalInputBuffer() do { PORTA.PIN4CTRL = (PORTA.PIN4CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0)
+#define IO_PA4_EnableInterruptForLowLevelSensing() do { PORTA.PIN4CTRL = (PORTA.PIN4CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0)
+#define PA4_SetInterruptHandler IO_PA4_SetInterruptHandler
+
+//get/set IO_PA6 aliases
+#define IO_PA6_SetHigh() do { PORTA_OUTSET = 0x40; } while(0)
+#define IO_PA6_SetLow() do { PORTA_OUTCLR = 0x40; } while(0)
+#define IO_PA6_Toggle() do { PORTA_OUTTGL = 0x40; } while(0)
+#define IO_PA6_GetValue() (VPORTA.IN & (0x1 << 6))
+#define IO_PA6_SetDigitalInput() do { PORTA_DIRCLR = 0x40; } while(0)
+#define IO_PA6_SetDigitalOutput() do { PORTA_DIRSET = 0x40; } while(0)
+#define IO_PA6_SetPullUp() do { PORTA_PIN6CTRL |= PORT_PULLUPEN_bm; } while(0)
+#define IO_PA6_ResetPullUp() do { PORTA_PIN6CTRL &= ~PORT_PULLUPEN_bm; } while(0)
+#define IO_PA6_SetInverted() do { PORTA_PIN6CTRL |= PORT_INVEN_bm; } while(0)
+#define IO_PA6_ResetInverted() do { PORTA_PIN6CTRL &= ~PORT_INVEN_bm; } while(0)
+#define IO_PA6_DisableInterruptOnChange() do { PORTA.PIN6CTRL = (PORTA.PIN6CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0)
+#define IO_PA6_EnableInterruptForBothEdges() do { PORTA.PIN6CTRL = (PORTA.PIN6CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0)
+#define IO_PA6_EnableInterruptForRisingEdge() do { PORTA.PIN6CTRL = (PORTA.PIN6CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0)
+#define IO_PA6_EnableInterruptForFallingEdge() do { PORTA.PIN6CTRL = (PORTA.PIN6CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0)
+#define IO_PA6_DisableDigitalInputBuffer() do { PORTA.PIN6CTRL = (PORTA.PIN6CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0)
+#define IO_PA6_EnableInterruptForLowLevelSensing() do { PORTA.PIN6CTRL = (PORTA.PIN6CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0)
+#define PA6_SetInterruptHandler IO_PA6_SetInterruptHandler
+
+//get/set IO_PA7 aliases
+#define IO_PA7_SetHigh() do { PORTA_OUTSET = 0x80; } while(0)
+#define IO_PA7_SetLow() do { PORTA_OUTCLR = 0x80; } while(0)
+#define IO_PA7_Toggle() do { PORTA_OUTTGL = 0x80; } while(0)
+#define IO_PA7_GetValue() (VPORTA.IN & (0x1 << 7))
+#define IO_PA7_SetDigitalInput() do { PORTA_DIRCLR = 0x80; } while(0)
+#define IO_PA7_SetDigitalOutput() do { PORTA_DIRSET = 0x80; } while(0)
+#define IO_PA7_SetPullUp() do { PORTA_PIN7CTRL |= PORT_PULLUPEN_bm; } while(0)
+#define IO_PA7_ResetPullUp() do { PORTA_PIN7CTRL &= ~PORT_PULLUPEN_bm; } while(0)
+#define IO_PA7_SetInverted() do { PORTA_PIN7CTRL |= PORT_INVEN_bm; } while(0)
+#define IO_PA7_ResetInverted() do { PORTA_PIN7CTRL &= ~PORT_INVEN_bm; } while(0)
+#define IO_PA7_DisableInterruptOnChange() do { PORTA.PIN7CTRL = (PORTA.PIN7CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0)
+#define IO_PA7_EnableInterruptForBothEdges() do { PORTA.PIN7CTRL = (PORTA.PIN7CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0)
+#define IO_PA7_EnableInterruptForRisingEdge() do { PORTA.PIN7CTRL = (PORTA.PIN7CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0)
+#define IO_PA7_EnableInterruptForFallingEdge() do { PORTA.PIN7CTRL = (PORTA.PIN7CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0)
+#define IO_PA7_DisableDigitalInputBuffer() do { PORTA.PIN7CTRL = (PORTA.PIN7CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0)
+#define IO_PA7_EnableInterruptForLowLevelSensing() do { PORTA.PIN7CTRL = (PORTA.PIN7CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0)
+#define PA7_SetInterruptHandler IO_PA7_SetInterruptHandler
+
+//get/set IO_PA2 aliases
+#define IO_PA2_SetHigh() do { PORTA_OUTSET = 0x4; } while(0)
+#define IO_PA2_SetLow() do { PORTA_OUTCLR = 0x4; } while(0)
+#define IO_PA2_Toggle() do { PORTA_OUTTGL = 0x4; } while(0)
+#define IO_PA2_GetValue() (VPORTA.IN & (0x1 << 2))
+#define IO_PA2_SetDigitalInput() do { PORTA_DIRCLR = 0x4; } while(0)
+#define IO_PA2_SetDigitalOutput() do { PORTA_DIRSET = 0x4; } while(0)
+#define IO_PA2_SetPullUp() do { PORTA_PIN2CTRL |= PORT_PULLUPEN_bm; } while(0)
+#define IO_PA2_ResetPullUp() do { PORTA_PIN2CTRL &= ~PORT_PULLUPEN_bm; } while(0)
+#define IO_PA2_SetInverted() do { PORTA_PIN2CTRL |= PORT_INVEN_bm; } while(0)
+#define IO_PA2_ResetInverted() do { PORTA_PIN2CTRL &= ~PORT_INVEN_bm; } while(0)
+#define IO_PA2_DisableInterruptOnChange() do { PORTA.PIN2CTRL = (PORTA.PIN2CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0)
+#define IO_PA2_EnableInterruptForBothEdges() do { PORTA.PIN2CTRL = (PORTA.PIN2CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0)
+#define IO_PA2_EnableInterruptForRisingEdge() do { PORTA.PIN2CTRL = (PORTA.PIN2CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0)
+#define IO_PA2_EnableInterruptForFallingEdge() do { PORTA.PIN2CTRL = (PORTA.PIN2CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0)
+#define IO_PA2_DisableDigitalInputBuffer() do { PORTA.PIN2CTRL = (PORTA.PIN2CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0)
+#define IO_PA2_EnableInterruptForLowLevelSensing() do { PORTA.PIN2CTRL = (PORTA.PIN2CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0)
+#define PA2_SetInterruptHandler IO_PA2_SetInterruptHandler
+
+//get/set IO_PA3 aliases
+#define IO_PA3_SetHigh() do { PORTA_OUTSET = 0x8; } while(0)
+#define IO_PA3_SetLow() do { PORTA_OUTCLR = 0x8; } while(0)
+#define IO_PA3_Toggle() do { PORTA_OUTTGL = 0x8; } while(0)
+#define IO_PA3_GetValue() (VPORTA.IN & (0x1 << 3))
+#define IO_PA3_SetDigitalInput() do { PORTA_DIRCLR = 0x8; } while(0)
+#define IO_PA3_SetDigitalOutput() do { PORTA_DIRSET = 0x8; } while(0)
+#define IO_PA3_SetPullUp() do { PORTA_PIN3CTRL |= PORT_PULLUPEN_bm; } while(0)
+#define IO_PA3_ResetPullUp() do { PORTA_PIN3CTRL &= ~PORT_PULLUPEN_bm; } while(0)
+#define IO_PA3_SetInverted() do { PORTA_PIN3CTRL |= PORT_INVEN_bm; } while(0)
+#define IO_PA3_ResetInverted() do { PORTA_PIN3CTRL &= ~PORT_INVEN_bm; } while(0)
+#define IO_PA3_DisableInterruptOnChange() do { PORTA.PIN3CTRL = (PORTA.PIN3CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0)
+#define IO_PA3_EnableInterruptForBothEdges() do { PORTA.PIN3CTRL = (PORTA.PIN3CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0)
+#define IO_PA3_EnableInterruptForRisingEdge() do { PORTA.PIN3CTRL = (PORTA.PIN3CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0)
+#define IO_PA3_EnableInterruptForFallingEdge() do { PORTA.PIN3CTRL = (PORTA.PIN3CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0)
+#define IO_PA3_DisableDigitalInputBuffer() do { PORTA.PIN3CTRL = (PORTA.PIN3CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0)
+#define IO_PA3_EnableInterruptForLowLevelSensing() do { PORTA.PIN3CTRL = (PORTA.PIN3CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0)
+#define PA3_SetInterruptHandler IO_PA3_SetInterruptHandler
+
+//get/set IO_PD0 aliases
+#define IO_PD0_SetHigh() do { PORTD_OUTSET = 0x1; } while(0)
+#define IO_PD0_SetLow() do { PORTD_OUTCLR = 0x1; } while(0)
+#define IO_PD0_Toggle() do { PORTD_OUTTGL = 0x1; } while(0)
+#define IO_PD0_GetValue() (VPORTD.IN & (0x1 << 0))
+#define IO_PD0_SetDigitalInput() do { PORTD_DIRCLR = 0x1; } while(0)
+#define IO_PD0_SetDigitalOutput() do { PORTD_DIRSET = 0x1; } while(0)
+#define IO_PD0_SetPullUp() do { PORTD_PIN0CTRL |= PORT_PULLUPEN_bm; } while(0)
+#define IO_PD0_ResetPullUp() do { PORTD_PIN0CTRL &= ~PORT_PULLUPEN_bm; } while(0)
+#define IO_PD0_SetInverted() do { PORTD_PIN0CTRL |= PORT_INVEN_bm; } while(0)
+#define IO_PD0_ResetInverted() do { PORTD_PIN0CTRL &= ~PORT_INVEN_bm; } while(0)
+#define IO_PD0_DisableInterruptOnChange() do { PORTD.PIN0CTRL = (PORTD.PIN0CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0)
+#define IO_PD0_EnableInterruptForBothEdges() do { PORTD.PIN0CTRL = (PORTD.PIN0CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0)
+#define IO_PD0_EnableInterruptForRisingEdge() do { PORTD.PIN0CTRL = (PORTD.PIN0CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0)
+#define IO_PD0_EnableInterruptForFallingEdge() do { PORTD.PIN0CTRL = (PORTD.PIN0CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0)
+#define IO_PD0_DisableDigitalInputBuffer() do { PORTD.PIN0CTRL = (PORTD.PIN0CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0)
+#define IO_PD0_EnableInterruptForLowLevelSensing() do { PORTD.PIN0CTRL = (PORTD.PIN0CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0)
+#define PD0_SetInterruptHandler IO_PD0_SetInterruptHandler
+
+//get/set IO_PD1 aliases
+#define IO_PD1_SetHigh() do { PORTD_OUTSET = 0x2; } while(0)
+#define IO_PD1_SetLow() do { PORTD_OUTCLR = 0x2; } while(0)
+#define IO_PD1_Toggle() do { PORTD_OUTTGL = 0x2; } while(0)
+#define IO_PD1_GetValue() (VPORTD.IN & (0x1 << 1))
+#define IO_PD1_SetDigitalInput() do { PORTD_DIRCLR = 0x2; } while(0)
+#define IO_PD1_SetDigitalOutput() do { PORTD_DIRSET = 0x2; } while(0)
+#define IO_PD1_SetPullUp() do { PORTD_PIN1CTRL |= PORT_PULLUPEN_bm; } while(0)
+#define IO_PD1_ResetPullUp() do { PORTD_PIN1CTRL &= ~PORT_PULLUPEN_bm; } while(0)
+#define IO_PD1_SetInverted() do { PORTD_PIN1CTRL |= PORT_INVEN_bm; } while(0)
+#define IO_PD1_ResetInverted() do { PORTD_PIN1CTRL &= ~PORT_INVEN_bm; } while(0)
+#define IO_PD1_DisableInterruptOnChange() do { PORTD.PIN1CTRL = (PORTD.PIN1CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0)
+#define IO_PD1_EnableInterruptForBothEdges() do { PORTD.PIN1CTRL = (PORTD.PIN1CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0)
+#define IO_PD1_EnableInterruptForRisingEdge() do { PORTD.PIN1CTRL = (PORTD.PIN1CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0)
+#define IO_PD1_EnableInterruptForFallingEdge() do { PORTD.PIN1CTRL = (PORTD.PIN1CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0)
+#define IO_PD1_DisableDigitalInputBuffer() do { PORTD.PIN1CTRL = (PORTD.PIN1CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0)
+#define IO_PD1_EnableInterruptForLowLevelSensing() do { PORTD.PIN1CTRL = (PORTD.PIN1CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0)
+#define PD1_SetInterruptHandler IO_PD1_SetInterruptHandler
+
+//get/set IO_PD2 aliases
+#define IO_PD2_SetHigh() do { PORTD_OUTSET = 0x4; } while(0)
+#define IO_PD2_SetLow() do { PORTD_OUTCLR = 0x4; } while(0)
+#define IO_PD2_Toggle() do { PORTD_OUTTGL = 0x4; } while(0)
+#define IO_PD2_GetValue() (VPORTD.IN & (0x1 << 2))
+#define IO_PD2_SetDigitalInput() do { PORTD_DIRCLR = 0x4; } while(0)
+#define IO_PD2_SetDigitalOutput() do { PORTD_DIRSET = 0x4; } while(0)
+#define IO_PD2_SetPullUp() do { PORTD_PIN2CTRL |= PORT_PULLUPEN_bm; } while(0)
+#define IO_PD2_ResetPullUp() do { PORTD_PIN2CTRL &= ~PORT_PULLUPEN_bm; } while(0)
+#define IO_PD2_SetInverted() do { PORTD_PIN2CTRL |= PORT_INVEN_bm; } while(0)
+#define IO_PD2_ResetInverted() do { PORTD_PIN2CTRL &= ~PORT_INVEN_bm; } while(0)
+#define IO_PD2_DisableInterruptOnChange() do { PORTD.PIN2CTRL = (PORTD.PIN2CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0)
+#define IO_PD2_EnableInterruptForBothEdges() do { PORTD.PIN2CTRL = (PORTD.PIN2CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0)
+#define IO_PD2_EnableInterruptForRisingEdge() do { PORTD.PIN2CTRL = (PORTD.PIN2CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0)
+#define IO_PD2_EnableInterruptForFallingEdge() do { PORTD.PIN2CTRL = (PORTD.PIN2CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0)
+#define IO_PD2_DisableDigitalInputBuffer() do { PORTD.PIN2CTRL = (PORTD.PIN2CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0)
+#define IO_PD2_EnableInterruptForLowLevelSensing() do { PORTD.PIN2CTRL = (PORTD.PIN2CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0)
+#define PD2_SetInterruptHandler IO_PD2_SetInterruptHandler
+
+//get/set IO_PD3 aliases
+#define IO_PD3_SetHigh() do { PORTD_OUTSET = 0x8; } while(0)
+#define IO_PD3_SetLow() do { PORTD_OUTCLR = 0x8; } while(0)
+#define IO_PD3_Toggle() do { PORTD_OUTTGL = 0x8; } while(0)
+#define IO_PD3_GetValue() (VPORTD.IN & (0x1 << 3))
+#define IO_PD3_SetDigitalInput() do { PORTD_DIRCLR = 0x8; } while(0)
+#define IO_PD3_SetDigitalOutput() do { PORTD_DIRSET = 0x8; } while(0)
+#define IO_PD3_SetPullUp() do { PORTD_PIN3CTRL |= PORT_PULLUPEN_bm; } while(0)
+#define IO_PD3_ResetPullUp() do { PORTD_PIN3CTRL &= ~PORT_PULLUPEN_bm; } while(0)
+#define IO_PD3_SetInverted() do { PORTD_PIN3CTRL |= PORT_INVEN_bm; } while(0)
+#define IO_PD3_ResetInverted() do { PORTD_PIN3CTRL &= ~PORT_INVEN_bm; } while(0)
+#define IO_PD3_DisableInterruptOnChange() do { PORTD.PIN3CTRL = (PORTD.PIN3CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0)
+#define IO_PD3_EnableInterruptForBothEdges() do { PORTD.PIN3CTRL = (PORTD.PIN3CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0)
+#define IO_PD3_EnableInterruptForRisingEdge() do { PORTD.PIN3CTRL = (PORTD.PIN3CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0)
+#define IO_PD3_EnableInterruptForFallingEdge() do { PORTD.PIN3CTRL = (PORTD.PIN3CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0)
+#define IO_PD3_DisableDigitalInputBuffer() do { PORTD.PIN3CTRL = (PORTD.PIN3CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0)
+#define IO_PD3_EnableInterruptForLowLevelSensing() do { PORTD.PIN3CTRL = (PORTD.PIN3CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0)
+#define PD3_SetInterruptHandler IO_PD3_SetInterruptHandler
+
+//get/set IO_PD4 aliases
+#define IO_PD4_SetHigh() do { PORTD_OUTSET = 0x10; } while(0)
+#define IO_PD4_SetLow() do { PORTD_OUTCLR = 0x10; } while(0)
+#define IO_PD4_Toggle() do { PORTD_OUTTGL = 0x10; } while(0)
+#define IO_PD4_GetValue() (VPORTD.IN & (0x1 << 4))
+#define IO_PD4_SetDigitalInput() do { PORTD_DIRCLR = 0x10; } while(0)
+#define IO_PD4_SetDigitalOutput() do { PORTD_DIRSET = 0x10; } while(0)
+#define IO_PD4_SetPullUp() do { PORTD_PIN4CTRL |= PORT_PULLUPEN_bm; } while(0)
+#define IO_PD4_ResetPullUp() do { PORTD_PIN4CTRL &= ~PORT_PULLUPEN_bm; } while(0)
+#define IO_PD4_SetInverted() do { PORTD_PIN4CTRL |= PORT_INVEN_bm; } while(0)
+#define IO_PD4_ResetInverted() do { PORTD_PIN4CTRL &= ~PORT_INVEN_bm; } while(0)
+#define IO_PD4_DisableInterruptOnChange() do { PORTD.PIN4CTRL = (PORTD.PIN4CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0)
+#define IO_PD4_EnableInterruptForBothEdges() do { PORTD.PIN4CTRL = (PORTD.PIN4CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0)
+#define IO_PD4_EnableInterruptForRisingEdge() do { PORTD.PIN4CTRL = (PORTD.PIN4CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0)
+#define IO_PD4_EnableInterruptForFallingEdge() do { PORTD.PIN4CTRL = (PORTD.PIN4CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0)
+#define IO_PD4_DisableDigitalInputBuffer() do { PORTD.PIN4CTRL = (PORTD.PIN4CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0)
+#define IO_PD4_EnableInterruptForLowLevelSensing() do { PORTD.PIN4CTRL = (PORTD.PIN4CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0)
+#define PD4_SetInterruptHandler IO_PD4_SetInterruptHandler
+
+//get/set IO_PD5 aliases
+#define IO_PD5_SetHigh() do { PORTD_OUTSET = 0x20; } while(0)
+#define IO_PD5_SetLow() do { PORTD_OUTCLR = 0x20; } while(0)
+#define IO_PD5_Toggle() do { PORTD_OUTTGL = 0x20; } while(0)
+#define IO_PD5_GetValue() (VPORTD.IN & (0x1 << 5))
+#define IO_PD5_SetDigitalInput() do { PORTD_DIRCLR = 0x20; } while(0)
+#define IO_PD5_SetDigitalOutput() do { PORTD_DIRSET = 0x20; } while(0)
+#define IO_PD5_SetPullUp() do { PORTD_PIN5CTRL |= PORT_PULLUPEN_bm; } while(0)
+#define IO_PD5_ResetPullUp() do { PORTD_PIN5CTRL &= ~PORT_PULLUPEN_bm; } while(0)
+#define IO_PD5_SetInverted() do { PORTD_PIN5CTRL |= PORT_INVEN_bm; } while(0)
+#define IO_PD5_ResetInverted() do { PORTD_PIN5CTRL &= ~PORT_INVEN_bm; } while(0)
+#define IO_PD5_DisableInterruptOnChange() do { PORTD.PIN5CTRL = (PORTD.PIN5CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0)
+#define IO_PD5_EnableInterruptForBothEdges() do { PORTD.PIN5CTRL = (PORTD.PIN5CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0)
+#define IO_PD5_EnableInterruptForRisingEdge() do { PORTD.PIN5CTRL = (PORTD.PIN5CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0)
+#define IO_PD5_EnableInterruptForFallingEdge() do { PORTD.PIN5CTRL = (PORTD.PIN5CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0)
+#define IO_PD5_DisableDigitalInputBuffer() do { PORTD.PIN5CTRL = (PORTD.PIN5CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0)
+#define IO_PD5_EnableInterruptForLowLevelSensing() do { PORTD.PIN5CTRL = (PORTD.PIN5CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0)
+#define PD5_SetInterruptHandler IO_PD5_SetInterruptHandler
+
+//get/set IO_PD6 aliases
+#define IO_PD6_SetHigh() do { PORTD_OUTSET = 0x40; } while(0)
+#define IO_PD6_SetLow() do { PORTD_OUTCLR = 0x40; } while(0)
+#define IO_PD6_Toggle() do { PORTD_OUTTGL = 0x40; } while(0)
+#define IO_PD6_GetValue() (VPORTD.IN & (0x1 << 6))
+#define IO_PD6_SetDigitalInput() do { PORTD_DIRCLR = 0x40; } while(0)
+#define IO_PD6_SetDigitalOutput() do { PORTD_DIRSET = 0x40; } while(0)
+#define IO_PD6_SetPullUp() do { PORTD_PIN6CTRL |= PORT_PULLUPEN_bm; } while(0)
+#define IO_PD6_ResetPullUp() do { PORTD_PIN6CTRL &= ~PORT_PULLUPEN_bm; } while(0)
+#define IO_PD6_SetInverted() do { PORTD_PIN6CTRL |= PORT_INVEN_bm; } while(0)
+#define IO_PD6_ResetInverted() do { PORTD_PIN6CTRL &= ~PORT_INVEN_bm; } while(0)
+#define IO_PD6_DisableInterruptOnChange() do { PORTD.PIN6CTRL = (PORTD.PIN6CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0)
+#define IO_PD6_EnableInterruptForBothEdges() do { PORTD.PIN6CTRL = (PORTD.PIN6CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0)
+#define IO_PD6_EnableInterruptForRisingEdge() do { PORTD.PIN6CTRL = (PORTD.PIN6CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0)
+#define IO_PD6_EnableInterruptForFallingEdge() do { PORTD.PIN6CTRL = (PORTD.PIN6CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0)
+#define IO_PD6_DisableDigitalInputBuffer() do { PORTD.PIN6CTRL = (PORTD.PIN6CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0)
+#define IO_PD6_EnableInterruptForLowLevelSensing() do { PORTD.PIN6CTRL = (PORTD.PIN6CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0)
+#define PD6_SetInterruptHandler IO_PD6_SetInterruptHandler
+
+//get/set IO_PD7 aliases
+#define IO_PD7_SetHigh() do { PORTD_OUTSET = 0x80; } while(0)
+#define IO_PD7_SetLow() do { PORTD_OUTCLR = 0x80; } while(0)
+#define IO_PD7_Toggle() do { PORTD_OUTTGL = 0x80; } while(0)
+#define IO_PD7_GetValue() (VPORTD.IN & (0x1 << 7))
+#define IO_PD7_SetDigitalInput() do { PORTD_DIRCLR = 0x80; } while(0)
+#define IO_PD7_SetDigitalOutput() do { PORTD_DIRSET = 0x80; } while(0)
+#define IO_PD7_SetPullUp() do { PORTD_PIN7CTRL |= PORT_PULLUPEN_bm; } while(0)
+#define IO_PD7_ResetPullUp() do { PORTD_PIN7CTRL &= ~PORT_PULLUPEN_bm; } while(0)
+#define IO_PD7_SetInverted() do { PORTD_PIN7CTRL |= PORT_INVEN_bm; } while(0)
+#define IO_PD7_ResetInverted() do { PORTD_PIN7CTRL &= ~PORT_INVEN_bm; } while(0)
+#define IO_PD7_DisableInterruptOnChange() do { PORTD.PIN7CTRL = (PORTD.PIN7CTRL & ~PORT_ISC_gm) | 0x0 ; } while(0)
+#define IO_PD7_EnableInterruptForBothEdges() do { PORTD.PIN7CTRL = (PORTD.PIN7CTRL & ~PORT_ISC_gm) | 0x1 ; } while(0)
+#define IO_PD7_EnableInterruptForRisingEdge() do { PORTD.PIN7CTRL = (PORTD.PIN7CTRL & ~PORT_ISC_gm) | 0x2 ; } while(0)
+#define IO_PD7_EnableInterruptForFallingEdge() do { PORTD.PIN7CTRL = (PORTD.PIN7CTRL & ~PORT_ISC_gm) | 0x3 ; } while(0)
+#define IO_PD7_DisableDigitalInputBuffer() do { PORTD.PIN7CTRL = (PORTD.PIN7CTRL & ~PORT_ISC_gm) | 0x4 ; } while(0)
+#define IO_PD7_EnableInterruptForLowLevelSensing() do { PORTD.PIN7CTRL = (PORTD.PIN7CTRL & ~PORT_ISC_gm) | 0x5 ; } while(0)
+#define PD7_SetInterruptHandler IO_PD7_SetInterruptHandler
+
+/**
+ * @ingroup pinsdriver
+ * @brief GPIO and peripheral I/O initialization
+ * @param none
+ * @return none
+ */
+void PIN_MANAGER_Initialize();
+
+/**
+ * @ingroup pinsdriver
+ * @brief Default Interrupt Handler for IO_PA5 pin.
+ * This is a predefined interrupt handler to be used together with the IO_PA5_SetInterruptHandler() method.
+ * This handler is called every time the IO_PA5 ISR is executed.
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param none
+ * @return none
+ */
+void IO_PA5_DefaultInterruptHandler(void);
+
+/**
+ * @ingroup pinsdriver
+ * @brief Interrupt Handler Setter for IO_PA5 pin input-sense-config functionality.
+ * Allows selecting an interrupt handler for IO_PA5 at application runtime
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param InterruptHandler function pointer.
+ * @return none
+ */
+void IO_PA5_SetInterruptHandler(void (* interruptHandler)(void)) ;
+
+/**
+ * @ingroup pinsdriver
+ * @brief Default Interrupt Handler for IO_PA4 pin.
+ * This is a predefined interrupt handler to be used together with the IO_PA4_SetInterruptHandler() method.
+ * This handler is called every time the IO_PA4 ISR is executed.
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param none
+ * @return none
+ */
+void IO_PA4_DefaultInterruptHandler(void);
+
+/**
+ * @ingroup pinsdriver
+ * @brief Interrupt Handler Setter for IO_PA4 pin input-sense-config functionality.
+ * Allows selecting an interrupt handler for IO_PA4 at application runtime
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param InterruptHandler function pointer.
+ * @return none
+ */
+void IO_PA4_SetInterruptHandler(void (* interruptHandler)(void)) ;
+
+/**
+ * @ingroup pinsdriver
+ * @brief Default Interrupt Handler for IO_PA6 pin.
+ * This is a predefined interrupt handler to be used together with the IO_PA6_SetInterruptHandler() method.
+ * This handler is called every time the IO_PA6 ISR is executed.
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param none
+ * @return none
+ */
+void IO_PA6_DefaultInterruptHandler(void);
+
+/**
+ * @ingroup pinsdriver
+ * @brief Interrupt Handler Setter for IO_PA6 pin input-sense-config functionality.
+ * Allows selecting an interrupt handler for IO_PA6 at application runtime
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param InterruptHandler function pointer.
+ * @return none
+ */
+void IO_PA6_SetInterruptHandler(void (* interruptHandler)(void)) ;
+
+/**
+ * @ingroup pinsdriver
+ * @brief Default Interrupt Handler for IO_PA7 pin.
+ * This is a predefined interrupt handler to be used together with the IO_PA7_SetInterruptHandler() method.
+ * This handler is called every time the IO_PA7 ISR is executed.
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param none
+ * @return none
+ */
+void IO_PA7_DefaultInterruptHandler(void);
+
+/**
+ * @ingroup pinsdriver
+ * @brief Interrupt Handler Setter for IO_PA7 pin input-sense-config functionality.
+ * Allows selecting an interrupt handler for IO_PA7 at application runtime
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param InterruptHandler function pointer.
+ * @return none
+ */
+void IO_PA7_SetInterruptHandler(void (* interruptHandler)(void)) ;
+
+/**
+ * @ingroup pinsdriver
+ * @brief Default Interrupt Handler for IO_PA2 pin.
+ * This is a predefined interrupt handler to be used together with the IO_PA2_SetInterruptHandler() method.
+ * This handler is called every time the IO_PA2 ISR is executed.
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param none
+ * @return none
+ */
+void IO_PA2_DefaultInterruptHandler(void);
+
+/**
+ * @ingroup pinsdriver
+ * @brief Interrupt Handler Setter for IO_PA2 pin input-sense-config functionality.
+ * Allows selecting an interrupt handler for IO_PA2 at application runtime
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param InterruptHandler function pointer.
+ * @return none
+ */
+void IO_PA2_SetInterruptHandler(void (* interruptHandler)(void)) ;
+
+/**
+ * @ingroup pinsdriver
+ * @brief Default Interrupt Handler for IO_PA3 pin.
+ * This is a predefined interrupt handler to be used together with the IO_PA3_SetInterruptHandler() method.
+ * This handler is called every time the IO_PA3 ISR is executed.
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param none
+ * @return none
+ */
+void IO_PA3_DefaultInterruptHandler(void);
+
+/**
+ * @ingroup pinsdriver
+ * @brief Interrupt Handler Setter for IO_PA3 pin input-sense-config functionality.
+ * Allows selecting an interrupt handler for IO_PA3 at application runtime
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param InterruptHandler function pointer.
+ * @return none
+ */
+void IO_PA3_SetInterruptHandler(void (* interruptHandler)(void)) ;
+
+/**
+ * @ingroup pinsdriver
+ * @brief Default Interrupt Handler for IO_PD0 pin.
+ * This is a predefined interrupt handler to be used together with the IO_PD0_SetInterruptHandler() method.
+ * This handler is called every time the IO_PD0 ISR is executed.
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param none
+ * @return none
+ */
+void IO_PD0_DefaultInterruptHandler(void);
+
+/**
+ * @ingroup pinsdriver
+ * @brief Interrupt Handler Setter for IO_PD0 pin input-sense-config functionality.
+ * Allows selecting an interrupt handler for IO_PD0 at application runtime
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param InterruptHandler function pointer.
+ * @return none
+ */
+void IO_PD0_SetInterruptHandler(void (* interruptHandler)(void)) ;
+
+/**
+ * @ingroup pinsdriver
+ * @brief Default Interrupt Handler for IO_PD1 pin.
+ * This is a predefined interrupt handler to be used together with the IO_PD1_SetInterruptHandler() method.
+ * This handler is called every time the IO_PD1 ISR is executed.
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param none
+ * @return none
+ */
+void IO_PD1_DefaultInterruptHandler(void);
+
+/**
+ * @ingroup pinsdriver
+ * @brief Interrupt Handler Setter for IO_PD1 pin input-sense-config functionality.
+ * Allows selecting an interrupt handler for IO_PD1 at application runtime
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param InterruptHandler function pointer.
+ * @return none
+ */
+void IO_PD1_SetInterruptHandler(void (* interruptHandler)(void)) ;
+
+/**
+ * @ingroup pinsdriver
+ * @brief Default Interrupt Handler for IO_PD2 pin.
+ * This is a predefined interrupt handler to be used together with the IO_PD2_SetInterruptHandler() method.
+ * This handler is called every time the IO_PD2 ISR is executed.
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param none
+ * @return none
+ */
+void IO_PD2_DefaultInterruptHandler(void);
+
+/**
+ * @ingroup pinsdriver
+ * @brief Interrupt Handler Setter for IO_PD2 pin input-sense-config functionality.
+ * Allows selecting an interrupt handler for IO_PD2 at application runtime
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param InterruptHandler function pointer.
+ * @return none
+ */
+void IO_PD2_SetInterruptHandler(void (* interruptHandler)(void)) ;
+
+/**
+ * @ingroup pinsdriver
+ * @brief Default Interrupt Handler for IO_PD3 pin.
+ * This is a predefined interrupt handler to be used together with the IO_PD3_SetInterruptHandler() method.
+ * This handler is called every time the IO_PD3 ISR is executed.
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param none
+ * @return none
+ */
+void IO_PD3_DefaultInterruptHandler(void);
+
+/**
+ * @ingroup pinsdriver
+ * @brief Interrupt Handler Setter for IO_PD3 pin input-sense-config functionality.
+ * Allows selecting an interrupt handler for IO_PD3 at application runtime
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param InterruptHandler function pointer.
+ * @return none
+ */
+void IO_PD3_SetInterruptHandler(void (* interruptHandler)(void)) ;
+
+/**
+ * @ingroup pinsdriver
+ * @brief Default Interrupt Handler for IO_PD4 pin.
+ * This is a predefined interrupt handler to be used together with the IO_PD4_SetInterruptHandler() method.
+ * This handler is called every time the IO_PD4 ISR is executed.
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param none
+ * @return none
+ */
+void IO_PD4_DefaultInterruptHandler(void);
+
+/**
+ * @ingroup pinsdriver
+ * @brief Interrupt Handler Setter for IO_PD4 pin input-sense-config functionality.
+ * Allows selecting an interrupt handler for IO_PD4 at application runtime
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param InterruptHandler function pointer.
+ * @return none
+ */
+void IO_PD4_SetInterruptHandler(void (* interruptHandler)(void)) ;
+
+/**
+ * @ingroup pinsdriver
+ * @brief Default Interrupt Handler for IO_PD5 pin.
+ * This is a predefined interrupt handler to be used together with the IO_PD5_SetInterruptHandler() method.
+ * This handler is called every time the IO_PD5 ISR is executed.
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param none
+ * @return none
+ */
+void IO_PD5_DefaultInterruptHandler(void);
+
+/**
+ * @ingroup pinsdriver
+ * @brief Interrupt Handler Setter for IO_PD5 pin input-sense-config functionality.
+ * Allows selecting an interrupt handler for IO_PD5 at application runtime
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param InterruptHandler function pointer.
+ * @return none
+ */
+void IO_PD5_SetInterruptHandler(void (* interruptHandler)(void)) ;
+
+/**
+ * @ingroup pinsdriver
+ * @brief Default Interrupt Handler for IO_PD6 pin.
+ * This is a predefined interrupt handler to be used together with the IO_PD6_SetInterruptHandler() method.
+ * This handler is called every time the IO_PD6 ISR is executed.
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param none
+ * @return none
+ */
+void IO_PD6_DefaultInterruptHandler(void);
+
+/**
+ * @ingroup pinsdriver
+ * @brief Interrupt Handler Setter for IO_PD6 pin input-sense-config functionality.
+ * Allows selecting an interrupt handler for IO_PD6 at application runtime
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param InterruptHandler function pointer.
+ * @return none
+ */
+void IO_PD6_SetInterruptHandler(void (* interruptHandler)(void)) ;
+
+/**
+ * @ingroup pinsdriver
+ * @brief Default Interrupt Handler for IO_PD7 pin.
+ * This is a predefined interrupt handler to be used together with the IO_PD7_SetInterruptHandler() method.
+ * This handler is called every time the IO_PD7 ISR is executed.
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param none
+ * @return none
+ */
+void IO_PD7_DefaultInterruptHandler(void);
+
+/**
+ * @ingroup pinsdriver
+ * @brief Interrupt Handler Setter for IO_PD7 pin input-sense-config functionality.
+ * Allows selecting an interrupt handler for IO_PD7 at application runtime
+ * @pre PIN_MANAGER_Initialize() has been called at least once
+ * @param InterruptHandler function pointer.
+ * @return none
+ */
+void IO_PD7_SetInterruptHandler(void (* interruptHandler)(void)) ;
+#endif /* PINS_H_INCLUDED */
diff --git a/mcc_generated_files/system/port.h b/mcc_generated_files/system/port.h new file mode 100644 index 0000000..3c6c5fb --- /dev/null +++ b/mcc_generated_files/system/port.h @@ -0,0 +1,902 @@ +/**
+ * Generated Ports header File
+ *
+ * @file port.h
+ *
+ * @ingroup pinsdriver
+ *
+ * @brief This Source file provides APIs.
+ *
+ * @version Driver Version 1.0.1
+*/
+
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+
+#ifndef PORT_INCLUDED
+#define PORT_INCLUDED
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "utils/compiler.h"
+
+/* @ingroup pinsdriver
+ * @enum port_pull_mode
+ * Defines the pullup modes.
+ */
+enum port_pull_mode {
+ PORT_PULL_OFF,
+ PORT_PULL_UP,
+};
+
+/* @ingroup pinsdriver
+ * @enum port_dir
+ * Defines the port directions.
+ */
+enum port_dir {
+ PORT_DIR_IN,
+ PORT_DIR_OUT,
+ PORT_DIR_OFF,
+};
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port pin pull mode, Configure pin to pull up, down or disable pull mode, supported pull modes are defined by device used.
+ * @param pin The pin number within port
+ * @param pull_mode Pin pull mode
+ * @return none
+ */
+static inline void PORTA_set_pin_pull_mode(const uint8_t pin, const enum port_pull_mode pull_mode)
+{
+ volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTA + 0x10 + pin);
+
+ if (pull_mode == PORT_PULL_UP) {
+ *port_pin_ctrl |= PORT_PULLUPEN_bm;
+ } else if (pull_mode == PORT_PULL_OFF) {
+ *port_pin_ctrl &= ~PORT_PULLUPEN_bm;
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port pin inverted mode, Configure pin invert I/O or not.
+ * @param pin The pin number within port
+ * @param inverted Pin inverted mode
+ * @return none
+ */
+static inline void PORTA_pin_set_inverted(const uint8_t pin, const bool inverted)
+{
+ volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTA + 0x10 + pin);
+
+ if (inverted) {
+ *port_pin_ctrl |= PORT_INVEN_bm;
+ } else {
+ *port_pin_ctrl &= ~PORT_INVEN_bm;
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port pin input/sense configuration, Enable/disable digital input buffer and pin change interrupt,
+ * select pin interrupt edge/level sensing mode
+ * @param The pin number within port
+ * @param isc PORT_ISC_t
+ * @return none
+ */
+static inline void PORTA_pin_set_isc(const uint8_t pin, const PORT_ISC_t isc)
+{
+ volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTA + 0x10 + pin);
+
+ *port_pin_ctrl = (*port_pin_ctrl & ~PORT_ISC_gm) | isc;
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port data direction, Select if the pin data direction is input, output or disabled.
+ * If disabled state is not possible, this function throws an assert.
+ *
+ * @param mask Bit mask where 1 means apply direction setting to the
+ * corresponding pin
+ * @param dir port_dir
+ * @return none
+ */
+static inline void PORTA_set_port_dir(const uint8_t mask, const enum port_dir dir)
+{
+ switch (dir) {
+ case PORT_DIR_IN:
+ VPORTA.DIR &= ~mask;
+ break;
+ case PORT_DIR_OUT:
+ VPORTA.DIR |= mask;
+ break;
+ case PORT_DIR_OFF:
+ /*/ should activate the pullup for power saving
+ but a bit costly to do it here */
+ {
+ for (uint8_t i = 0; i < 8; i++) {
+ if (mask & 1 << i) {
+ *((uint8_t *)&PORTA + 0x10 + i) |= 1 << PORT_PULLUPEN_bp;
+ }
+ }
+ }
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port pin data direction, Select if the pin data direction is input, output or disabled.
+ * If disabled state is not possible, this function throws an assert.
+ *
+ * @param pin The pin number within port
+ * @param dir port_dir
+ * @return none
+ */
+static inline void PORTA_set_pin_dir(const uint8_t pin, const enum port_dir dir)
+{
+ switch (dir) {
+ case PORT_DIR_IN:
+ VPORTA.DIR &= ~(1 << pin);
+ break;
+ case PORT_DIR_OUT:
+ VPORTA.DIR |= (1 << pin);
+ break;
+ case PORT_DIR_OFF:
+ *((uint8_t *)&PORTA + 0x10 + pin) |= 1 << PORT_PULLUPEN_bp;
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port level, Sets output level on the pins defined by the bit mask.
+ *
+ * @param mask Bit mask where 1 means apply port level to the corresponding
+ * pin
+ * @param level -boolean value that defines the logic state of the pin level
+ * false = Pin levels set to "low" state
+ * @return none
+ */
+static inline void PORTA_set_port_level(const uint8_t mask, const bool level)
+{
+ if (level == true) {
+ VPORTA.OUT |= mask;
+ } else {
+ VPORTA.OUT &= ~mask;
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port level, Sets output level on a pin.
+ *
+ * @param pin The pin number within port
+ * @param level -boolean value that defines the logic state of the pin level
+ * @return none
+ */
+static inline void PORTA_set_pin_level(const uint8_t pin, const bool level)
+{
+ if (level == true) {
+ VPORTA.OUT |= (1 << pin);
+ } else {
+ VPORTA.OUT &= ~(1 << pin);
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Toggle out level on pins, Toggle the pin levels on pins defined by bit mask.
+ *
+ * @param mask Bit mask where 1 means toggle pin level to the corresponding
+ * pin
+ * @return none
+ */
+static inline void PORTA_toggle_port_level(const uint8_t mask)
+{
+ PORTA.OUTTGL = mask;
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Toggle output level on pin, Toggle the pin levels on pins defined by bit mask.
+ *
+ * @param pin The pin number within port
+ * @return none
+ */
+static inline void PORTA_toggle_pin_level(const uint8_t pin)
+{
+ PORTA.OUTTGL = 1 << pin;
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Get input level on pins, Read the input level on pins connected to a port.
+ *
+ * @param none
+ * @return none
+ */
+static inline uint8_t PORTA_get_port_level()
+{
+ return VPORTA.IN;
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Get level on pin, Reads the level on pins connected to a port.
+ *
+ * @param pin The pin number within port
+ * @return none
+ */
+static inline bool PORTA_get_pin_level(const uint8_t pin)
+{
+ return VPORTA.IN & (1 << pin);
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Write value to Port, Write directly to the port OUT register.
+ *
+ * @param value Value to write to the port register
+ * @return none
+ */
+static inline void PORTA_write_port(const uint8_t value)
+{
+ VPORTA.OUT = value;
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port pin pull mode, Configure pin to pull up, down or disable pull mode, supported pull modes are defined by device used.
+ * @param pin The pin number within port
+ * @param pull_mode Pin pull mode
+ * @return none
+ */
+static inline void PORTC_set_pin_pull_mode(const uint8_t pin, const enum port_pull_mode pull_mode)
+{
+ volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTC + 0x10 + pin);
+
+ if (pull_mode == PORT_PULL_UP) {
+ *port_pin_ctrl |= PORT_PULLUPEN_bm;
+ } else if (pull_mode == PORT_PULL_OFF) {
+ *port_pin_ctrl &= ~PORT_PULLUPEN_bm;
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port pin inverted mode, Configure pin invert I/O or not.
+ * @param pin The pin number within port
+ * @param inverted Pin inverted mode
+ * @return none
+ */
+static inline void PORTC_pin_set_inverted(const uint8_t pin, const bool inverted)
+{
+ volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTC + 0x10 + pin);
+
+ if (inverted) {
+ *port_pin_ctrl |= PORT_INVEN_bm;
+ } else {
+ *port_pin_ctrl &= ~PORT_INVEN_bm;
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port pin input/sense configuration, Enable/disable digital input buffer and pin change interrupt,
+ * select pin interrupt edge/level sensing mode
+ * @param The pin number within port
+ * @param isc PORT_ISC_t
+ * @return none
+ */
+static inline void PORTC_pin_set_isc(const uint8_t pin, const PORT_ISC_t isc)
+{
+ volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTC + 0x10 + pin);
+
+ *port_pin_ctrl = (*port_pin_ctrl & ~PORT_ISC_gm) | isc;
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port data direction, Select if the pin data direction is input, output or disabled.
+ * If disabled state is not possible, this function throws an assert.
+ *
+ * @param mask Bit mask where 1 means apply direction setting to the
+ * corresponding pin
+ * @param dir port_dir
+ * @return none
+ */
+static inline void PORTC_set_port_dir(const uint8_t mask, const enum port_dir dir)
+{
+ switch (dir) {
+ case PORT_DIR_IN:
+ VPORTC.DIR &= ~mask;
+ break;
+ case PORT_DIR_OUT:
+ VPORTC.DIR |= mask;
+ break;
+ case PORT_DIR_OFF:
+ /*/ should activate the pullup for power saving
+ but a bit costly to do it here */
+ {
+ for (uint8_t i = 0; i < 8; i++) {
+ if (mask & 1 << i) {
+ *((uint8_t *)&PORTC + 0x10 + i) |= 1 << PORT_PULLUPEN_bp;
+ }
+ }
+ }
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port pin data direction, Select if the pin data direction is input, output or disabled.
+ * If disabled state is not possible, this function throws an assert.
+ *
+ * @param pin The pin number within port
+ * @param dir port_dir
+ * @return none
+ */
+static inline void PORTC_set_pin_dir(const uint8_t pin, const enum port_dir dir)
+{
+ switch (dir) {
+ case PORT_DIR_IN:
+ VPORTC.DIR &= ~(1 << pin);
+ break;
+ case PORT_DIR_OUT:
+ VPORTC.DIR |= (1 << pin);
+ break;
+ case PORT_DIR_OFF:
+ *((uint8_t *)&PORTC + 0x10 + pin) |= 1 << PORT_PULLUPEN_bp;
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port level, Sets output level on the pins defined by the bit mask.
+ *
+ * @param mask Bit mask where 1 means apply port level to the corresponding
+ * pin
+ * @param level -boolean value that defines the logic state of the pin level
+ * false = Pin levels set to "low" state
+ * @return none
+ */
+static inline void PORTC_set_port_level(const uint8_t mask, const bool level)
+{
+ if (level == true) {
+ VPORTC.OUT |= mask;
+ } else {
+ VPORTC.OUT &= ~mask;
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port level, Sets output level on a pin.
+ *
+ * @param pin The pin number within port
+ * @param level -boolean value that defines the logic state of the pin level
+ * @return none
+ */
+static inline void PORTC_set_pin_level(const uint8_t pin, const bool level)
+{
+ if (level == true) {
+ VPORTC.OUT |= (1 << pin);
+ } else {
+ VPORTC.OUT &= ~(1 << pin);
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Toggle out level on pins, Toggle the pin levels on pins defined by bit mask.
+ *
+ * @param mask Bit mask where 1 means toggle pin level to the corresponding
+ * pin
+ * @return none
+ */
+static inline void PORTC_toggle_port_level(const uint8_t mask)
+{
+ PORTC.OUTTGL = mask;
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Toggle output level on pin, Toggle the pin levels on pins defined by bit mask.
+ *
+ * @param pin The pin number within port
+ * @return none
+ */
+static inline void PORTC_toggle_pin_level(const uint8_t pin)
+{
+ PORTC.OUTTGL = 1 << pin;
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Get input level on pins, Read the input level on pins connected to a port.
+ *
+ * @param none
+ * @return none
+ */
+static inline uint8_t PORTC_get_port_level()
+{
+ return VPORTC.IN;
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Get level on pin, Reads the level on pins connected to a port.
+ *
+ * @param pin The pin number within port
+ * @return none
+ */
+static inline bool PORTC_get_pin_level(const uint8_t pin)
+{
+ return VPORTC.IN & (1 << pin);
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Write value to Port, Write directly to the port OUT register.
+ *
+ * @param value Value to write to the port register
+ * @return none
+ */
+static inline void PORTC_write_port(const uint8_t value)
+{
+ VPORTC.OUT = value;
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port pin pull mode, Configure pin to pull up, down or disable pull mode, supported pull modes are defined by device used.
+ * @param pin The pin number within port
+ * @param pull_mode Pin pull mode
+ * @return none
+ */
+static inline void PORTD_set_pin_pull_mode(const uint8_t pin, const enum port_pull_mode pull_mode)
+{
+ volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTD + 0x10 + pin);
+
+ if (pull_mode == PORT_PULL_UP) {
+ *port_pin_ctrl |= PORT_PULLUPEN_bm;
+ } else if (pull_mode == PORT_PULL_OFF) {
+ *port_pin_ctrl &= ~PORT_PULLUPEN_bm;
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port pin inverted mode, Configure pin invert I/O or not.
+ * @param pin The pin number within port
+ * @param inverted Pin inverted mode
+ * @return none
+ */
+static inline void PORTD_pin_set_inverted(const uint8_t pin, const bool inverted)
+{
+ volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTD + 0x10 + pin);
+
+ if (inverted) {
+ *port_pin_ctrl |= PORT_INVEN_bm;
+ } else {
+ *port_pin_ctrl &= ~PORT_INVEN_bm;
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port pin input/sense configuration, Enable/disable digital input buffer and pin change interrupt,
+ * select pin interrupt edge/level sensing mode
+ * @param The pin number within port
+ * @param isc PORT_ISC_t
+ * @return none
+ */
+static inline void PORTD_pin_set_isc(const uint8_t pin, const PORT_ISC_t isc)
+{
+ volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTD + 0x10 + pin);
+
+ *port_pin_ctrl = (*port_pin_ctrl & ~PORT_ISC_gm) | isc;
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port data direction, Select if the pin data direction is input, output or disabled.
+ * If disabled state is not possible, this function throws an assert.
+ *
+ * @param mask Bit mask where 1 means apply direction setting to the
+ * corresponding pin
+ * @param dir port_dir
+ * @return none
+ */
+static inline void PORTD_set_port_dir(const uint8_t mask, const enum port_dir dir)
+{
+ switch (dir) {
+ case PORT_DIR_IN:
+ VPORTD.DIR &= ~mask;
+ break;
+ case PORT_DIR_OUT:
+ VPORTD.DIR |= mask;
+ break;
+ case PORT_DIR_OFF:
+ /*/ should activate the pullup for power saving
+ but a bit costly to do it here */
+ {
+ for (uint8_t i = 0; i < 8; i++) {
+ if (mask & 1 << i) {
+ *((uint8_t *)&PORTD + 0x10 + i) |= 1 << PORT_PULLUPEN_bp;
+ }
+ }
+ }
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port pin data direction, Select if the pin data direction is input, output or disabled.
+ * If disabled state is not possible, this function throws an assert.
+ *
+ * @param pin The pin number within port
+ * @param dir port_dir
+ * @return none
+ */
+static inline void PORTD_set_pin_dir(const uint8_t pin, const enum port_dir dir)
+{
+ switch (dir) {
+ case PORT_DIR_IN:
+ VPORTD.DIR &= ~(1 << pin);
+ break;
+ case PORT_DIR_OUT:
+ VPORTD.DIR |= (1 << pin);
+ break;
+ case PORT_DIR_OFF:
+ *((uint8_t *)&PORTD + 0x10 + pin) |= 1 << PORT_PULLUPEN_bp;
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port level, Sets output level on the pins defined by the bit mask.
+ *
+ * @param mask Bit mask where 1 means apply port level to the corresponding
+ * pin
+ * @param level -boolean value that defines the logic state of the pin level
+ * false = Pin levels set to "low" state
+ * @return none
+ */
+static inline void PORTD_set_port_level(const uint8_t mask, const bool level)
+{
+ if (level == true) {
+ VPORTD.OUT |= mask;
+ } else {
+ VPORTD.OUT &= ~mask;
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port level, Sets output level on a pin.
+ *
+ * @param pin The pin number within port
+ * @param level -boolean value that defines the logic state of the pin level
+ * @return none
+ */
+static inline void PORTD_set_pin_level(const uint8_t pin, const bool level)
+{
+ if (level == true) {
+ VPORTD.OUT |= (1 << pin);
+ } else {
+ VPORTD.OUT &= ~(1 << pin);
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Toggle out level on pins, Toggle the pin levels on pins defined by bit mask.
+ *
+ * @param mask Bit mask where 1 means toggle pin level to the corresponding
+ * pin
+ * @return none
+ */
+static inline void PORTD_toggle_port_level(const uint8_t mask)
+{
+ PORTD.OUTTGL = mask;
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Toggle output level on pin, Toggle the pin levels on pins defined by bit mask.
+ *
+ * @param pin The pin number within port
+ * @return none
+ */
+static inline void PORTD_toggle_pin_level(const uint8_t pin)
+{
+ PORTD.OUTTGL = 1 << pin;
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Get input level on pins, Read the input level on pins connected to a port.
+ *
+ * @param none
+ * @return none
+ */
+static inline uint8_t PORTD_get_port_level()
+{
+ return VPORTD.IN;
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Get level on pin, Reads the level on pins connected to a port.
+ *
+ * @param pin The pin number within port
+ * @return none
+ */
+static inline bool PORTD_get_pin_level(const uint8_t pin)
+{
+ return VPORTD.IN & (1 << pin);
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Write value to Port, Write directly to the port OUT register.
+ *
+ * @param value Value to write to the port register
+ * @return none
+ */
+static inline void PORTD_write_port(const uint8_t value)
+{
+ VPORTD.OUT = value;
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port pin pull mode, Configure pin to pull up, down or disable pull mode, supported pull modes are defined by device used.
+ * @param pin The pin number within port
+ * @param pull_mode Pin pull mode
+ * @return none
+ */
+static inline void PORTF_set_pin_pull_mode(const uint8_t pin, const enum port_pull_mode pull_mode)
+{
+ volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTF + 0x10 + pin);
+
+ if (pull_mode == PORT_PULL_UP) {
+ *port_pin_ctrl |= PORT_PULLUPEN_bm;
+ } else if (pull_mode == PORT_PULL_OFF) {
+ *port_pin_ctrl &= ~PORT_PULLUPEN_bm;
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port pin inverted mode, Configure pin invert I/O or not.
+ * @param pin The pin number within port
+ * @param inverted Pin inverted mode
+ * @return none
+ */
+static inline void PORTF_pin_set_inverted(const uint8_t pin, const bool inverted)
+{
+ volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTF + 0x10 + pin);
+
+ if (inverted) {
+ *port_pin_ctrl |= PORT_INVEN_bm;
+ } else {
+ *port_pin_ctrl &= ~PORT_INVEN_bm;
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port pin input/sense configuration, Enable/disable digital input buffer and pin change interrupt,
+ * select pin interrupt edge/level sensing mode
+ * @param The pin number within port
+ * @param isc PORT_ISC_t
+ * @return none
+ */
+static inline void PORTF_pin_set_isc(const uint8_t pin, const PORT_ISC_t isc)
+{
+ volatile uint8_t *port_pin_ctrl = ((uint8_t *)&PORTF + 0x10 + pin);
+
+ *port_pin_ctrl = (*port_pin_ctrl & ~PORT_ISC_gm) | isc;
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port data direction, Select if the pin data direction is input, output or disabled.
+ * If disabled state is not possible, this function throws an assert.
+ *
+ * @param mask Bit mask where 1 means apply direction setting to the
+ * corresponding pin
+ * @param dir port_dir
+ * @return none
+ */
+static inline void PORTF_set_port_dir(const uint8_t mask, const enum port_dir dir)
+{
+ switch (dir) {
+ case PORT_DIR_IN:
+ VPORTF.DIR &= ~mask;
+ break;
+ case PORT_DIR_OUT:
+ VPORTF.DIR |= mask;
+ break;
+ case PORT_DIR_OFF:
+ /*/ should activate the pullup for power saving
+ but a bit costly to do it here */
+ {
+ for (uint8_t i = 0; i < 8; i++) {
+ if (mask & 1 << i) {
+ *((uint8_t *)&PORTF + 0x10 + i) |= 1 << PORT_PULLUPEN_bp;
+ }
+ }
+ }
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port pin data direction, Select if the pin data direction is input, output or disabled.
+ * If disabled state is not possible, this function throws an assert.
+ *
+ * @param pin The pin number within port
+ * @param dir port_dir
+ * @return none
+ */
+static inline void PORTF_set_pin_dir(const uint8_t pin, const enum port_dir dir)
+{
+ switch (dir) {
+ case PORT_DIR_IN:
+ VPORTF.DIR &= ~(1 << pin);
+ break;
+ case PORT_DIR_OUT:
+ VPORTF.DIR |= (1 << pin);
+ break;
+ case PORT_DIR_OFF:
+ *((uint8_t *)&PORTF + 0x10 + pin) |= 1 << PORT_PULLUPEN_bp;
+ break;
+ default:
+ break;
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port level, Sets output level on the pins defined by the bit mask.
+ *
+ * @param mask Bit mask where 1 means apply port level to the corresponding
+ * pin
+ * @param level -boolean value that defines the logic state of the pin level
+ * false = Pin levels set to "low" state
+ * @return none
+ */
+static inline void PORTF_set_port_level(const uint8_t mask, const bool level)
+{
+ if (level == true) {
+ VPORTF.OUT |= mask;
+ } else {
+ VPORTF.OUT &= ~mask;
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Set port level, Sets output level on a pin.
+ *
+ * @param pin The pin number within port
+ * @param level -boolean value that defines the logic state of the pin level
+ * @return none
+ */
+static inline void PORTF_set_pin_level(const uint8_t pin, const bool level)
+{
+ if (level == true) {
+ VPORTF.OUT |= (1 << pin);
+ } else {
+ VPORTF.OUT &= ~(1 << pin);
+ }
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Toggle out level on pins, Toggle the pin levels on pins defined by bit mask.
+ *
+ * @param mask Bit mask where 1 means toggle pin level to the corresponding
+ * pin
+ * @return none
+ */
+static inline void PORTF_toggle_port_level(const uint8_t mask)
+{
+ PORTF.OUTTGL = mask;
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Toggle output level on pin, Toggle the pin levels on pins defined by bit mask.
+ *
+ * @param pin The pin number within port
+ * @return none
+ */
+static inline void PORTF_toggle_pin_level(const uint8_t pin)
+{
+ PORTF.OUTTGL = 1 << pin;
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Get input level on pins, Read the input level on pins connected to a port.
+ *
+ * @param none
+ * @return none
+ */
+static inline uint8_t PORTF_get_port_level()
+{
+ return VPORTF.IN;
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Get level on pin, Reads the level on pins connected to a port.
+ *
+ * @param pin The pin number within port
+ * @return none
+ */
+static inline bool PORTF_get_pin_level(const uint8_t pin)
+{
+ return VPORTF.IN & (1 << pin);
+}
+
+/**
+ * @ingroup pinsdriver
+ * @brief Write value to Port, Write directly to the port OUT register.
+ *
+ * @param value Value to write to the port register
+ * @return none
+ */
+static inline void PORTF_write_port(const uint8_t value)
+{
+ VPORTF.OUT = value;
+}
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PORT_INCLUDED */
\ No newline at end of file diff --git a/mcc_generated_files/system/protected_io.h b/mcc_generated_files/system/protected_io.h new file mode 100644 index 0000000..05d934c --- /dev/null +++ b/mcc_generated_files/system/protected_io.h @@ -0,0 +1,80 @@ +/**
+ * protected_io Header File
+ *
+ * @file protected_io.h
+ *
+ * @defgroup doc_driver_system_protected_io Protected IO
+ *
+ * @brief This file contains the generated prtected_io header file for the CONFIGURATION BITS.
+ *
+ * @version Driver Version 1.0.0
+ *
+ *@{
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+#ifndef PROTECTED_IO_H
+#define PROTECTED_IO_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(__DOXYGEN__)
+//! \name IAR Memory Model defines.
+//@{
+
+/**
+ * @def CONFIG_MEMORY_MODEL_TINY
+ * @brief Configuration symbol to enable 8 bit pointers.
+ */
+#define CONFIG_MEMORY_MODEL_TINY
+
+/**
+ * @def CONFIG_MEMORY_MODEL_SMALL
+ * @brief Configuration symbol to enable 16 bit pointers.
+ * NOTE: If no memory model is defined, SMALL is default.
+ */
+#define CONFIG_MEMORY_MODEL_SMALL
+
+/**
+ * @def CONFIG_MEMORY_MODEL_LARGE
+ * @brief Configuration symbol to enable 24 bit pointers.
+ */
+#define CONFIG_MEMORY_MODEL_LARGE
+
+//@}
+#endif
+
+/**
+ * @brief Writes to an 8-bit I/O register protected by CCP or a protection bit.
+ * @param addr Address of the I/O register.
+ * @param magic CCP magic value or Mask for protection bit.
+ * @param value Value to be written.
+ * NOTE: Using IAR Embedded workbench, the choice of memory model has an impact on calling convention.
+ * Memory model must be defined in the Assembler preprocessor directives to be visible to the preprocessor.
+ */
+extern void protected_write_io(void *addr, uint8_t magic, uint8_t value);
+
+/** @} */
+
+#endif /* PROTECTED_IO_H */
diff --git a/mcc_generated_files/system/src/clock.c b/mcc_generated_files/system/src/clock.c new file mode 100644 index 0000000..08efbea --- /dev/null +++ b/mcc_generated_files/system/src/clock.c @@ -0,0 +1,105 @@ +
+
+/**
+ * CLKCTRL Generated Driver File
+ *
+ * @file clkctrl.c
+ *
+ * @ingroup clkctrl
+ *
+ * @brief This file contains the driver code for CLKCTRL module.
+ *
+ * version CLKCTRL Driver Version 1.1.4
+ *
+ * @version Package Version 2.0.10
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+
+#include "../clock.h"
+
+void CLOCK_Initialize(void)
+{
+ ccp_write_io((void*)&(CLKCTRL.MCLKCTRLA),(1 << CLKCTRL_CLKOUT_bp) // CLKOUT enabled
+ | CLKCTRL_CLKSEL_EXTCLK_gc // CLKSEL External clock
+ );
+ ccp_write_io((void*)&(CLKCTRL.MCLKCTRLB),CLKCTRL_PDIV_DIV2_gc // PDIV Divide by 2
+ | (0 << CLKCTRL_PEN_bp) // PEN disabled
+ );
+ ccp_write_io((void*)&(CLKCTRL.OSC32KCTRLA),(0 << CLKCTRL_RUNSTDBY_bp) // RUNSTDBY disabled
+ );
+ ccp_write_io((void*)&(CLKCTRL.OSCHFCTRLA),CLKCTRL_AUTOTUNE_OFF_gc // AUTOTUNE OFF
+ | CLKCTRL_FRQSEL_4M_gc // FRQSEL 4 MHz system clock (default)
+ | (0 << CLKCTRL_RUNSTDBY_bp) // RUNSTDBY disabled
+ | CLKCTRL_ALGSEL_BIN_gc // ALGSEL BIN
+ );
+ ccp_write_io((void*)&(CLKCTRL.OSCHFTUNE),0x0 // TUNE 0x0
+ );
+
+ ccp_write_io((void*)&(CLKCTRL.XOSC32KCTRLA),CLKCTRL_CSUT_1K_gc // CSUT 1k cycles
+ | (0 << CLKCTRL_ENABLE_bp) // ENABLE disabled
+ | (0 << CLKCTRL_LPMODE_bp) // LPMODE disabled
+ | (0 << CLKCTRL_RUNSTDBY_bp) // RUNSTDBY disabled
+ | CLKCTRL_SEL_XTAL_gc // SEL XTAL
+ );
+ ccp_write_io((void*)&(CLKCTRL.MCLKCTRLC),(0 << CLKCTRL_CFDEN_bp) // CFDEN disabled
+ | CLKCTRL_CFDSRC_XOSCHF_gc // CFDSRC XOSCHF
+ | (0 << CLKCTRL_CFDTST_bp) // CFDTST disabled
+ );
+ ccp_write_io((void*)&(CLKCTRL.MCLKINTCTRL),(0 << CLKCTRL_CFD_bp) // CFD disabled
+ | CLKCTRL_INTTYPE_INT_gc // INTTYPE INT
+ );
+ ccp_write_io((void*)&(CLKCTRL.MCLKINTFLAGS),(0 << CLKCTRL_CFD_bp) // CFD disabled
+ );
+ ccp_write_io((void*)&(CLKCTRL.XOSCHFCTRLA),CLKCTRL_CSUTHF_256_gc // CSUTHF 256
+ | (1 << CLKCTRL_ENABLE_bp) // ENABLE enabled
+ | CLKCTRL_FRQRANGE_24M_gc // FRQRANGE 24M
+ | (1 << CLKCTRL_RUNSTBY_bp) // RUNSTBY enabled
+ | CLKCTRL_SELHF_XTAL_gc // SELHF XTAL
+ );
+
+ ccp_write_io((void*)&(CLKCTRL.MCLKTIMEBASE),0x18 // TIMEBASE 24
+ );
+
+ // System clock stability check by polling the status register.
+ while(!(CLKCTRL.MCLKSTATUS & CLKCTRL_EXTS_bm))
+ {
+ }
+
+}
+
+void CFD_Enable(CLKCTRL_CFDSRC_t cfd_source)
+{
+ /* Enable Clock Failure Detection on main clock */
+ ccp_write_io((uint8_t *) & CLKCTRL.MCLKCTRLC, cfd_source | CLKCTRL_CFDEN_bm);
+}
+
+void CFD_Disable(void)
+{
+ /* Disable Clock Failure Detection on main clock */
+ ccp_write_io((uint8_t *) & CLKCTRL.MCLKCTRLC, CLKCTRL.MCLKCTRLC & ~CLKCTRL_CFDEN_bm);
+}
+
+
+/**
+ End of File
+*/
\ No newline at end of file diff --git a/mcc_generated_files/system/src/config_bits.c b/mcc_generated_files/system/src/config_bits.c new file mode 100644 index 0000000..44dd4ce --- /dev/null +++ b/mcc_generated_files/system/src/config_bits.c @@ -0,0 +1,50 @@ +/**
+ * CONFIGURATION BITS Generated Driver Source File
+ *
+ * @file config_bits.c
+ *
+ * @ingroup config_bitsdriver
+ *
+ * @brief This file contains the API implementation for the Device Configuration Bits driver.
+ *
+ * @version Driver Version 1.0.5
+ *
+ * @version Package Version 4.3.0
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+#include <avr/io.h>
+
+/**
+ * Configures the Fuse bits.
+ */
+FUSES =
+{
+ .BODCFG = ACTIVE_DISABLE_gc | LVL_BODLEVEL0_gc | SAMPFREQ_128Hz_gc | SLEEP_DISABLE_gc,
+ .BOOTSIZE = 0x0,
+ .CODESIZE = 0x0,
+ .OSCCFG = CLKSEL_OSCHF_gc,
+ .PDICFG = KEY_NOTACT_gc | LEVEL_BASIC_gc,
+ .SYSCFG0 = CRCSEL_CRC16_gc | CRCSRC_NOCRC_gc | RSTPINCFG_RST_gc | UPDIPINCFG_UPDI_gc,
+ .SYSCFG1 = SUT_0MS_gc | USBSINK_ENABLE_gc,
+ .WDTCFG = PERIOD_OFF_gc | WINDOW_OFF_gc,
+};
diff --git a/mcc_generated_files/system/src/interrupt.c b/mcc_generated_files/system/src/interrupt.c new file mode 100644 index 0000000..aeb81e6 --- /dev/null +++ b/mcc_generated_files/system/src/interrupt.c @@ -0,0 +1,53 @@ +/**
+ * Interrupt Manager Generated Driver File.
+ *
+ * @file interrupt.c
+ *
+ * @ingroup interrupt
+ *
+ * @brief This file contains the API implementation for the Interrupt Manager.
+ *
+ * @version Interrupt Manager Driver Version 1.0.0
+*/
+
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+
+#include "../interrupt.h"
+
+int8_t CPUINT_Initialize()
+{
+ /* IVSEL and CVT are Configuration Change Protected */
+
+ //CVT disabled; IVSEL disabled; LVL0RR disabled;
+ ccp_write_io((void*)&(CPUINT.CTRLA),0x0);
+
+ //LVL0PRI 0;
+ CPUINT.LVL0PRI = 0x0;
+
+ //LVL1VEC 0;
+ CPUINT.LVL1VEC = 0x0;
+
+ ENABLE_INTERRUPTS();
+
+ return 0;
+}
\ No newline at end of file diff --git a/mcc_generated_files/system/src/pins.c b/mcc_generated_files/system/src/pins.c new file mode 100644 index 0000000..92133c9 --- /dev/null +++ b/mcc_generated_files/system/src/pins.c @@ -0,0 +1,393 @@ +/**
+ * Generated Driver File
+ *
+ * @file pins.c
+ *
+ * @ingroup pinsdriver
+ *
+ * @brief This is generated driver implementation for pins.
+ * This file provides implementations for pin APIs for all pins selected in the GUI.
+ *
+ * @version Driver Version 1.1.0
+*/
+
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+#include "../pins.h"
+
+static void (*IO_PA5_InterruptHandler)(void);
+static void (*IO_PA4_InterruptHandler)(void);
+static void (*IO_PA6_InterruptHandler)(void);
+static void (*IO_PA7_InterruptHandler)(void);
+static void (*IO_PA2_InterruptHandler)(void);
+static void (*IO_PA3_InterruptHandler)(void);
+static void (*IO_PD0_InterruptHandler)(void);
+static void (*IO_PD1_InterruptHandler)(void);
+static void (*IO_PD2_InterruptHandler)(void);
+static void (*IO_PD3_InterruptHandler)(void);
+static void (*IO_PD4_InterruptHandler)(void);
+static void (*IO_PD5_InterruptHandler)(void);
+static void (*IO_PD6_InterruptHandler)(void);
+static void (*IO_PD7_InterruptHandler)(void);
+
+void PIN_MANAGER_Initialize()
+{
+
+ /* OUT Registers Initialization */
+ PORTA.OUT = 0x0;
+ PORTC.OUT = 0x0;
+ PORTD.OUT = 0x0;
+ PORTF.OUT = 0x0;
+
+ /* DIR Registers Initialization */
+ PORTA.DIR = 0xDC;
+ PORTC.DIR = 0x0;
+ PORTD.DIR = 0xFF;
+ PORTF.DIR = 0x0;
+
+ /* PINxCTRL registers Initialization */
+ PORTA.PIN0CTRL = 0x0;
+ PORTA.PIN1CTRL = 0x0;
+ PORTA.PIN2CTRL = 0x0;
+ PORTA.PIN3CTRL = 0x0;
+ PORTA.PIN4CTRL = 0x0;
+ PORTA.PIN5CTRL = 0x0;
+ PORTA.PIN6CTRL = 0x0;
+ PORTA.PIN7CTRL = 0x0;
+ PORTC.PIN0CTRL = 0x0;
+ PORTC.PIN1CTRL = 0x0;
+ PORTC.PIN2CTRL = 0x0;
+ PORTC.PIN3CTRL = 0x0;
+ PORTC.PIN4CTRL = 0x0;
+ PORTC.PIN5CTRL = 0x0;
+ PORTC.PIN6CTRL = 0x0;
+ PORTC.PIN7CTRL = 0x0;
+ PORTD.PIN0CTRL = 0x0;
+ PORTD.PIN1CTRL = 0x0;
+ PORTD.PIN2CTRL = 0x0;
+ PORTD.PIN3CTRL = 0x0;
+ PORTD.PIN4CTRL = 0x0;
+ PORTD.PIN5CTRL = 0x0;
+ PORTD.PIN6CTRL = 0x0;
+ PORTD.PIN7CTRL = 0x0;
+ PORTF.PIN0CTRL = 0x0;
+ PORTF.PIN1CTRL = 0x0;
+ PORTF.PIN2CTRL = 0x0;
+ PORTF.PIN3CTRL = 0x0;
+ PORTF.PIN4CTRL = 0x0;
+ PORTF.PIN5CTRL = 0x0;
+ PORTF.PIN6CTRL = 0x0;
+ PORTF.PIN7CTRL = 0x0;
+
+ /* PORTMUX Initialization */
+ PORTMUX.CCLROUTEA = 0x0;
+ PORTMUX.EVSYSROUTEA = 0x0;
+ PORTMUX.SPIROUTEA = 0x0;
+ PORTMUX.TCAROUTEA = 0x0;
+ PORTMUX.TCBROUTEA = 0x0;
+ PORTMUX.TWIROUTEA = 0x0;
+ PORTMUX.USARTROUTEA = 0x0;
+
+ // register default ISC callback functions at runtime; use these methods to register a custom function
+ IO_PA5_SetInterruptHandler(IO_PA5_DefaultInterruptHandler);
+ IO_PA4_SetInterruptHandler(IO_PA4_DefaultInterruptHandler);
+ IO_PA6_SetInterruptHandler(IO_PA6_DefaultInterruptHandler);
+ IO_PA7_SetInterruptHandler(IO_PA7_DefaultInterruptHandler);
+ IO_PA2_SetInterruptHandler(IO_PA2_DefaultInterruptHandler);
+ IO_PA3_SetInterruptHandler(IO_PA3_DefaultInterruptHandler);
+ IO_PD0_SetInterruptHandler(IO_PD0_DefaultInterruptHandler);
+ IO_PD1_SetInterruptHandler(IO_PD1_DefaultInterruptHandler);
+ IO_PD2_SetInterruptHandler(IO_PD2_DefaultInterruptHandler);
+ IO_PD3_SetInterruptHandler(IO_PD3_DefaultInterruptHandler);
+ IO_PD4_SetInterruptHandler(IO_PD4_DefaultInterruptHandler);
+ IO_PD5_SetInterruptHandler(IO_PD5_DefaultInterruptHandler);
+ IO_PD6_SetInterruptHandler(IO_PD6_DefaultInterruptHandler);
+ IO_PD7_SetInterruptHandler(IO_PD7_DefaultInterruptHandler);
+}
+
+/**
+ Allows selecting an interrupt handler for IO_PA5 at application runtime
+*/
+void IO_PA5_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PA5_InterruptHandler = interruptHandler;
+}
+
+void IO_PA5_DefaultInterruptHandler(void)
+{
+ // add your IO_PA5 interrupt custom code
+ // or set custom function using IO_PA5_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PA4 at application runtime
+*/
+void IO_PA4_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PA4_InterruptHandler = interruptHandler;
+}
+
+void IO_PA4_DefaultInterruptHandler(void)
+{
+ // add your IO_PA4 interrupt custom code
+ // or set custom function using IO_PA4_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PA6 at application runtime
+*/
+void IO_PA6_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PA6_InterruptHandler = interruptHandler;
+}
+
+void IO_PA6_DefaultInterruptHandler(void)
+{
+ // add your IO_PA6 interrupt custom code
+ // or set custom function using IO_PA6_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PA7 at application runtime
+*/
+void IO_PA7_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PA7_InterruptHandler = interruptHandler;
+}
+
+void IO_PA7_DefaultInterruptHandler(void)
+{
+ // add your IO_PA7 interrupt custom code
+ // or set custom function using IO_PA7_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PA2 at application runtime
+*/
+void IO_PA2_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PA2_InterruptHandler = interruptHandler;
+}
+
+void IO_PA2_DefaultInterruptHandler(void)
+{
+ // add your IO_PA2 interrupt custom code
+ // or set custom function using IO_PA2_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PA3 at application runtime
+*/
+void IO_PA3_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PA3_InterruptHandler = interruptHandler;
+}
+
+void IO_PA3_DefaultInterruptHandler(void)
+{
+ // add your IO_PA3 interrupt custom code
+ // or set custom function using IO_PA3_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PD0 at application runtime
+*/
+void IO_PD0_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PD0_InterruptHandler = interruptHandler;
+}
+
+void IO_PD0_DefaultInterruptHandler(void)
+{
+ // add your IO_PD0 interrupt custom code
+ // or set custom function using IO_PD0_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PD1 at application runtime
+*/
+void IO_PD1_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PD1_InterruptHandler = interruptHandler;
+}
+
+void IO_PD1_DefaultInterruptHandler(void)
+{
+ // add your IO_PD1 interrupt custom code
+ // or set custom function using IO_PD1_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PD2 at application runtime
+*/
+void IO_PD2_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PD2_InterruptHandler = interruptHandler;
+}
+
+void IO_PD2_DefaultInterruptHandler(void)
+{
+ // add your IO_PD2 interrupt custom code
+ // or set custom function using IO_PD2_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PD3 at application runtime
+*/
+void IO_PD3_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PD3_InterruptHandler = interruptHandler;
+}
+
+void IO_PD3_DefaultInterruptHandler(void)
+{
+ // add your IO_PD3 interrupt custom code
+ // or set custom function using IO_PD3_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PD4 at application runtime
+*/
+void IO_PD4_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PD4_InterruptHandler = interruptHandler;
+}
+
+void IO_PD4_DefaultInterruptHandler(void)
+{
+ // add your IO_PD4 interrupt custom code
+ // or set custom function using IO_PD4_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PD5 at application runtime
+*/
+void IO_PD5_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PD5_InterruptHandler = interruptHandler;
+}
+
+void IO_PD5_DefaultInterruptHandler(void)
+{
+ // add your IO_PD5 interrupt custom code
+ // or set custom function using IO_PD5_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PD6 at application runtime
+*/
+void IO_PD6_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PD6_InterruptHandler = interruptHandler;
+}
+
+void IO_PD6_DefaultInterruptHandler(void)
+{
+ // add your IO_PD6 interrupt custom code
+ // or set custom function using IO_PD6_SetInterruptHandler()
+}
+/**
+ Allows selecting an interrupt handler for IO_PD7 at application runtime
+*/
+void IO_PD7_SetInterruptHandler(void (* interruptHandler)(void))
+{
+ IO_PD7_InterruptHandler = interruptHandler;
+}
+
+void IO_PD7_DefaultInterruptHandler(void)
+{
+ // add your IO_PD7 interrupt custom code
+ // or set custom function using IO_PD7_SetInterruptHandler()
+}
+ISR(PORTA_PORT_vect)
+{
+ // Call the interrupt handler for the callback registered at runtime
+ if(VPORTA.INTFLAGS & PORT_INT5_bm)
+ {
+ IO_PA5_InterruptHandler();
+ }
+ if(VPORTA.INTFLAGS & PORT_INT4_bm)
+ {
+ IO_PA4_InterruptHandler();
+ }
+ if(VPORTA.INTFLAGS & PORT_INT6_bm)
+ {
+ IO_PA6_InterruptHandler();
+ }
+ if(VPORTA.INTFLAGS & PORT_INT7_bm)
+ {
+ IO_PA7_InterruptHandler();
+ }
+ if(VPORTA.INTFLAGS & PORT_INT2_bm)
+ {
+ IO_PA2_InterruptHandler();
+ }
+ if(VPORTA.INTFLAGS & PORT_INT3_bm)
+ {
+ IO_PA3_InterruptHandler();
+ }
+ /* Clear interrupt flags */
+ VPORTA.INTFLAGS = 0xff;
+}
+
+ISR(PORTC_PORT_vect)
+{
+ /* Clear interrupt flags */
+ VPORTC.INTFLAGS = 0xff;
+}
+
+ISR(PORTD_PORT_vect)
+{
+ // Call the interrupt handler for the callback registered at runtime
+ if(VPORTD.INTFLAGS & PORT_INT0_bm)
+ {
+ IO_PD0_InterruptHandler();
+ }
+ if(VPORTD.INTFLAGS & PORT_INT1_bm)
+ {
+ IO_PD1_InterruptHandler();
+ }
+ if(VPORTD.INTFLAGS & PORT_INT2_bm)
+ {
+ IO_PD2_InterruptHandler();
+ }
+ if(VPORTD.INTFLAGS & PORT_INT3_bm)
+ {
+ IO_PD3_InterruptHandler();
+ }
+ if(VPORTD.INTFLAGS & PORT_INT4_bm)
+ {
+ IO_PD4_InterruptHandler();
+ }
+ if(VPORTD.INTFLAGS & PORT_INT5_bm)
+ {
+ IO_PD5_InterruptHandler();
+ }
+ if(VPORTD.INTFLAGS & PORT_INT6_bm)
+ {
+ IO_PD6_InterruptHandler();
+ }
+ if(VPORTD.INTFLAGS & PORT_INT7_bm)
+ {
+ IO_PD7_InterruptHandler();
+ }
+ /* Clear interrupt flags */
+ VPORTD.INTFLAGS = 0xff;
+}
+
+ISR(PORTF_PORT_vect)
+{
+ /* Clear interrupt flags */
+ VPORTF.INTFLAGS = 0xff;
+}
+
+/**
+ End of File
+*/
\ No newline at end of file diff --git a/mcc_generated_files/system/src/protected_io.S b/mcc_generated_files/system/src/protected_io.S new file mode 100644 index 0000000..4a60008 --- /dev/null +++ b/mcc_generated_files/system/src/protected_io.S @@ -0,0 +1,90 @@ +/**
+ * protected_io Source Code File
+ *
+ * @file protected_io.S
+ *
+ * @ingroup config_bitsdriver
+ *
+ * @brief This file contains the generated protected_io source code file for the CONFIGURATION BITS.
+ *
+ * @version Driver Version 1.0.0
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+
+#include "../utils/assembler.h"
+
+/*
+ * GNU and IAR use different calling conventions. Since this is
+ * a very small and simple function to begin with, it's easier
+ * to implement it twice than to deal with the differences
+ * within a single implementation.
+ */
+
+ PUBLIC_FUNCTION(protected_write_io)
+
+#if defined(__GNUC__)
+
+#ifdef RAMPZ
+ out _SFR_IO_ADDR(RAMPZ), r1 // Clear bits 23:16 of Z
+#endif
+ movw r30, r24 // Load addr into Z
+ out CCP, r22 // Start CCP handshake
+ st Z, r20 // Write value to I/O register
+ ret // Return to caller
+
+#elif defined(__IAR_SYSTEMS_ASM__)
+
+# if !defined(CONFIG_MEMORY_MODEL_TINY) && !defined(CONFIG_MEMORY_MODEL_SMALL) \
+ && !defined(CONFIG_MEMORY_MODEL_LARGE)
+# define CONFIG_MEMORY_MODEL_SMALL
+# endif
+# if defined(CONFIG_MEMORY_MODEL_LARGE)
+ ldi r20, 0
+ out RAMPZ, r20 // Reset bits 23:16 of Z
+ movw r30, r16 // Load addr into Z
+# elif defined(CONFIG_MEMORY_MODEL_TINY)
+ ldi r31, 0 // Reset bits 8:15 of Z
+ mov r30, r16 // Load addr into Z
+# else
+ movw r30, r16 // Load addr into Z
+# endif
+# if defined(CONFIG_MEMORY_MODEL_TINY)
+ out CCP, r17 // Start CCP handshake
+ st Z, r18 // Write value to I/O register
+# elif defined(CONFIG_MEMORY_MODEL_SMALL)
+ out CCP, r18 // Start CCP handshake
+ st Z, r19 // Write value to I/O register
+# elif defined(CONFIG_MEMORY_MODEL_LARGE)
+ out CCP, r19 // Start CCP handshake
+ st Z, r20 // Write value to I/O register
+# else
+# error Unknown memory model in use, no idea how registers should be accessed
+# endif
+ ret
+#else
+# error Unknown assembler
+#endif
+
+ END_FUNC(protected_write_io)
+ END_FILE()
+
diff --git a/mcc_generated_files/system/src/syscfg.c b/mcc_generated_files/system/src/syscfg.c new file mode 100644 index 0000000..ce8bc01 --- /dev/null +++ b/mcc_generated_files/system/src/syscfg.c @@ -0,0 +1,64 @@ +
+/**
+ * SYSCFG Generated Driver File
+ *
+ * @file syscfg.c
+ *
+ * @ingroup syscfg
+ *
+ * @brief This is the generated driver implementation file for the SYSCFG driver.
+ *
+ * @version SYSCFG Driver Version 1.0.0
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+/**
+ Section: Included Files
+*/
+
+#include "../../system/utils/compiler.h"
+#include "../syscfg.h"
+
+/**
+ Section: SYSCFG APIs
+*/
+
+void SYSCFG_Initialize(void)
+{
+ SYSCFG.VUSBCTRL = (1 << SYSCFG_USBVREG_bp); // USBVREG ENABLE;
+}
+uint8_t SYSCFG_GetRevId(void)
+{
+ return SYSCFG.REVID;
+}
+inline void SYSCFG_UsbVregEnable(void)
+{
+ SYSCFG.VUSBCTRL = SYSCFG_USBVREG_bm;
+}
+inline void SYSCFG_UsbVregDisable(void)
+{
+ SYSCFG.VUSBCTRL = ~SYSCFG_USBVREG_bm;
+}
+
+/**
+ End of File
+*/
\ No newline at end of file diff --git a/mcc_generated_files/system/src/system.c b/mcc_generated_files/system/src/system.c new file mode 100644 index 0000000..12217fb --- /dev/null +++ b/mcc_generated_files/system/src/system.c @@ -0,0 +1,47 @@ +/**
+ * System Driver Source File
+ *
+ * @file system.c
+ *
+ * @ingroup systemdriver
+ *
+ * @brief This file contains the API implementation for the System driver.
+ *
+ * @version Driver Version 1.0.3
+ *
+ * @version Package Version 4.3.0
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+#include "../system.h"
+
+void SYSTEM_Initialize(void)
+{
+ CLOCK_Initialize();
+ SYSCFG_Initialize();
+ PIN_MANAGER_Initialize();
+ SPI0_Initialize();
+ USB0_Initialize();
+ USBDevice_Initialize();
+ CPUINT_Initialize();
+}
+
diff --git a/mcc_generated_files/system/syscfg.h b/mcc_generated_files/system/syscfg.h new file mode 100644 index 0000000..962333d --- /dev/null +++ b/mcc_generated_files/system/syscfg.h @@ -0,0 +1,83 @@ +/**
+ * SYSCFG Generated Driver API Header File
+ *
+ * @file syscfg.h
+ *
+ * @defgroup syscfg SYSCFG
+ *
+ * @brief This is the generated header file for the SYSCFG driver
+ *
+ * @version SYSCFG Driver Version 1.0.0
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+#ifndef SYSCFG_H
+#define SYSCFG_H
+
+/**
+ Section: Included Files
+*/
+
+#include <stdbool.h>
+#include <stdint.h>
+
+/**
+ Section: SYSCFG APIs
+*/
+
+/**
+ * @ingroup syscfg
+ * @brief Initializes the SYSCFG driver. This routine is called only once during system initialization, before calling other APIs.
+ * @param None.
+ * @return None.
+ */
+void SYSCFG_Initialize(void);
+
+/**
+ * @ingroup syscfg
+ * @brief Returns the SYSCFG Revision ID.
+ * @param None.
+ * @return uint8_t
+ */
+uint8_t SYSCFG_GetRevId(void);
+
+/**
+ * @ingroup syscfg
+ * @brief Enables the SYSCFG USB voltage regulator.
+ * @param None.
+ * @return None.
+ */
+ void SYSCFG_UsbVregEnable(void);
+
+/**
+ * @ingroup syscfg
+ * @brief Disables the SYSCFG USB voltage regulator.
+ * @param None.
+ * @return None.
+ */
+void SYSCFG_UsbVregDisable(void);
+
+
+#endif // SYSCFG_H
+/**
+ End of File
+*/
diff --git a/mcc_generated_files/system/system.h b/mcc_generated_files/system/system.h new file mode 100644 index 0000000..6acf7ce --- /dev/null +++ b/mcc_generated_files/system/system.h @@ -0,0 +1,66 @@ +/**
+ * System Driver Header File
+ *
+ * @file system.h
+ *
+ * @defgroup systemdriver System Driver
+ *
+ * @brief This file contains the API prototype for the System Driver.
+ *
+ * @version Driver Version 1.0.3
+ *
+ * @version Package Version 4.3.0
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+
+#ifndef MCC_H
+#define MCC_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "../system/utils/compiler.h"
+#include "config_bits.h"
+#include "../system/pins.h"
+#include "../usb/usb0.h"
+#include "../usb/usb_device.h"
+#include "../system/interrupt.h"
+#include "../system/clock.h"
+#include "../system/syscfg.h"
+#include "../spi/spi0.h"
+/**
+ * @ingroup systemdriver
+ * @brief Initializes the System module. This routine is called only once during system initialization, before calling any other API.
+ * @param None.
+ * @return None.
+*/
+void SYSTEM_Initialize(void);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* MCC_H */
+/**
+ End of File
+*/
\ No newline at end of file diff --git a/mcc_generated_files/system/utils/assembler.h b/mcc_generated_files/system/utils/assembler.h new file mode 100644 index 0000000..0182fcc --- /dev/null +++ b/mcc_generated_files/system/utils/assembler.h @@ -0,0 +1,49 @@ +/**
+ * Assembler Header File
+ *
+ * @file assembler.h
+ *
+ * @ingroup config_bitsdriver
+ *
+ * @brief This file contains the assembler header file for the configuration bits driver.
+ *
+ * @version Driver Version 1.0.0
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+
+#ifndef ASSEMBLER_H_INCLUDED
+#define ASSEMBLER_H_INCLUDED
+
+#if !defined(__ASSEMBLER__) && !defined(__IAR_SYSTEMS_ASM__) && !defined(__DOXYGEN__)
+#error This file may only be included from assembly files
+#endif
+
+#if defined(__ASSEMBLER__)
+#include "assembler/gas.h"
+#include <avr/io.h>
+#elif defined(__IAR_SYSTEMS_ASM__)
+#include "assembler/iar.h"
+#include <ioavr.h>
+#endif
+
+#endif /* ASSEMBLER_H_INCLUDED */
diff --git a/mcc_generated_files/system/utils/assembler/gas.h b/mcc_generated_files/system/utils/assembler/gas.h new file mode 100644 index 0000000..44a0186 --- /dev/null +++ b/mcc_generated_files/system/utils/assembler/gas.h @@ -0,0 +1,120 @@ +/**
+ * GAS Header File
+ *
+ * @file gas.h
+ *
+ * @ingroup config_bitsdriver
+ *
+ * @brief This file contains the generated GAS header file for the Configuration bits driver.
+ *
+ * @version Driver Version 1.0.0
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+
+#ifndef ASSEMBLER_GAS_H_INCLUDED
+#define ASSEMBLER_GAS_H_INCLUDED
+
+#ifndef __DOXYGEN__
+
+/* clang-format off */
+
+ /* IAR doesn't accept dots in macro names */
+ .macro ld_addr, reg, sym
+ lda.w \reg, \sym
+ .endm
+
+ /* Define a function \a name that is either globally visible or only
+ * file-local.
+ */
+ .macro gas_begin_func name, is_public
+ .if \is_public
+ .global \name
+ .endif
+ #ifdef __XC8
+ .section .text.\name, code
+ #else
+ .section .text.\name, "ax", @progbits
+ #endif
+ .type \name, @function
+ \name :
+ .endm
+
+ /* Define a function \a name that is either globally visible or only
+ * file-local in a given segment.
+ */
+ .macro gas_begin_func_segm name, is_public, segment
+ .if \is_public
+ .global \name
+ .endif
+ .section .\segment, "ax", @progbits
+ .type \name, @function
+ \name :
+ .endm
+
+ /* Define \a name as a weak alias for the function \a strong_name */
+ .macro gas_weak_function_alias name, strong_name
+ .global \name
+ .weak \name
+ .type \name, @function
+ .set \name, \strong_name
+ .endm
+
+ /* Define a weak function called \a name */
+ .macro gas_weak_function name
+ .weak \name
+ gas_begin_func \name 1
+ .endm
+
+#define REPEAT(count) .rept count
+#define END_REPEAT() .endr
+#define FILL_BYTES(count) .fill count
+#define SET_LOC(offset) .org offset
+#define L(name) .L##name
+#define EXTERN_SYMBOL(name)
+
+#define TEXT_SECTION(name) \
+ .section name, "ax", @progbits
+#define RODATA_SECTION(name) \
+ .section name, "a", @progbits
+#define DATA_SECTION(name) \
+ .section name, "aw", @progbits
+#define BSS_SECTION(name) \
+ .section name, "aw", @nobits
+
+#define FUNCTION(name) gas_begin_func name 0
+#define PUBLIC_FUNCTION(name) gas_begin_func name 1
+#define PUBLIC_FUNCTION_SEGMENT(name, segment) \
+ gas_begin_func_segm name 1 segment
+#define WEAK_FUNCTION(name) gas_weak_function name
+#define WEAK_FUNCTION_ALIAS(name, strong_name) \
+ gas_weak_function_alias name strong_name
+#define END_FUNC(name) \
+ .size name, . - name
+
+#define END_FILE()
+
+/* clang-format on */
+
+#endif /* __DOXYGEN__ */
+
+#endif /* ASSEMBLER_GAS_H_INCLUDED */
diff --git a/mcc_generated_files/system/utils/assembler/iar.h b/mcc_generated_files/system/utils/assembler/iar.h new file mode 100644 index 0000000..b2fe674 --- /dev/null +++ b/mcc_generated_files/system/utils/assembler/iar.h @@ -0,0 +1,104 @@ +/**
+ * IAR Header File
+ *
+ * @file iar.h
+ *
+ * @ingroup config_bitsdriver
+ *
+ * @brief This file contains the generated IAR header file for the Configuration bits driver.
+ *
+ * @version Driver Version 1.0.0
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+
+#ifndef ASSEMBLER_IAR_H_INCLUDED
+#define ASSEMBLER_IAR_H_INCLUDED
+
+/* clang-format off */
+
+ld_addr MACRO reg, sym
+ mov reg, LWRD sym
+ orh reg, HWRD sym
+ ENDM
+
+call MACRO sym
+ rcall sym
+ ENDM
+
+iar_begin_func MACRO name, sect, is_public, is_weak
+ MODULE name
+ RSEG CODE:CODE:NOROOT(1)
+ IF is_weak == 1
+ PUBWEAK name
+ ELSEIF is_public
+ PUBLIC name
+ ENDIF
+name:
+ ENDM
+
+iar_begin_func_segm MACRO name, sect, is_public, is_weak, segment
+ MODULE name
+ RSEG segment:CODE:NOROOT(1)
+ IF is_weak == 1
+ PUBWEAK name
+ ELSEIF is_public
+ PUBLIC name
+ ENDIF
+name:
+ ENDM
+
+iar_weak_alias MACRO name, strong_name
+ PUBWEAK name
+name:
+ rjmp strong_name
+ ENDM
+
+#define lo(x) LWRD x
+#define hi(x) HWRD x
+
+#define REPEAT(count) REPT count
+#define END_REPEAT() ENDR
+#define SET_LOC(offset) ORG offset
+#define END_FILE() END
+
+#define FILL_BYTES(count) DS8 count
+
+#define L(name) name
+#define EXTERN_SYMBOL(name) EXTERN name
+#define FUNCTION(name) iar_begin_func name, text_##name, 0, 0
+#define PUBLIC_FUNCTION(name) iar_begin_func name, text_##name, 1, 0
+#define PUBLIC_FUNCTION_SEGMENT(name, segment) \
+ iar_begin_func_segm name, text_##name, 1, 0, segment
+#define WEAK_FUNCTION(name) iar_begin_func name, text_##name, 1, 1
+#define WEAK_FUNCTION_ALIAS(name, strong_name) \
+ iar_weak_alias name, strong_name
+#define END_FUNC(name) ENDMOD
+
+#define TEXT_SECTION(name) RSEG name:CODE:NOROOT
+#define RODATA_SECTION(name) RSEG name:CONST:NOROOT
+#define DATA_SECTION(name) RSEG name:DATA:NOROOT
+#define BSS_SECTION(name) RSEG name:DATA:NOROOT
+
+/* clang-format on */
+
+#endif /* ASSEMBLER_IAR_H_INCLUDED */
diff --git a/mcc_generated_files/system/utils/atomic.h b/mcc_generated_files/system/utils/atomic.h new file mode 100644 index 0000000..0878285 --- /dev/null +++ b/mcc_generated_files/system/utils/atomic.h @@ -0,0 +1,87 @@ +/**
+ * CONFIGURATION BITS Generated Atomic Header File
+ *
+ * @file atomic.h
+ *
+ * @defgroup doc_driver_utils_atomic Atomic memory access and critical sections
+ *
+ * @brief This file contains the atomic memory access and critical sections header file for the configuration bits driver.
+ *
+ * @version Driver Version 1.0.0
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+
+#ifndef ATOMIC_H
+#define ATOMIC_H
+
+/* clang-format off */
+
+#if defined(__GNUC__) || defined (__DOXYGEN__)
+
+/**
+ * @brief Enters critical region. Saves the contents of the status register, including the Global Interrupt Enable bit, so that it can be restored upon leaving the critical region.
+ * Thereafter, clears the Global Interrupt Enable Bit.This macro takes a parameter P that is unused for the GCC compiler,but necessary for code compatibility with the IAR compiler.
+ * The IAR compiler declares a variable with the name of the parameter forholding the SREG value.
+ * Compilation will fail when the variable declared in the macro is not unique within the scope that the critical region is declared within.
+ * @param[in] UNUSED(GCC)/P(IAR) Name of variable storing SREG.
+ */
+
+#define ENTER_CRITICAL(UNUSED) __asm__ __volatile__ ( \
+ "in __tmp_reg__, __SREG__" "\n\t" \
+ "cli" "\n\t" \
+ "push __tmp_reg__" "\n\t" \
+ ::: "memory" \
+ )
+
+/**
+ * @brief Exits a critical region. Restores the contents of the status register, including the Global Interrupt Enable bit, as it was when entering the critical region.
+ * This macro takes a parameter P that is unused for the GCC compiler, but necessary for code compatibility with the IAR compiler.
+ * The IAR compiler uses this parameter as the name of a variable that holds the SREG value.
+ * The parameter must be identical to the parameter used in the corresponding ENTER_CRITICAL().
+ * @param[in] UNUSED(GCC)/P(IAR) Name of variable storing SREG
+ */
+
+#define EXIT_CRITICAL(UNUSED) __asm__ __volatile__ ( \
+ "pop __tmp_reg__" "\n\t" \
+ "out __SREG__, __tmp_reg__" "\n\t" \
+ ::: "memory" \
+ )
+
+#define DISABLE_INTERRUPTS() __asm__ __volatile__ ( "cli" ::: "memory")
+#define ENABLE_INTERRUPTS() __asm__ __volatile__ ( "sei" ::: "memory")
+
+#elif defined(__ICCAVR__)
+
+#define ENTER_CRITICAL(P) unsigned char P = __save_interrupt();__disable_interrupt();
+#define EXIT_CRITICAL(P) __restore_interrupt(P);
+
+#define DISABLE_INTERRUPTS() __disable_interrupt();
+#define ENABLE_INTERRUPTS() __enable_interrupt();
+
+#else
+# error Unsupported compiler.
+#endif
+
+/* clang-format on */
+
+#endif /* ATOMIC_H */
diff --git a/mcc_generated_files/system/utils/compiler.h b/mcc_generated_files/system/utils/compiler.h new file mode 100644 index 0000000..5447b31 --- /dev/null +++ b/mcc_generated_files/system/utils/compiler.h @@ -0,0 +1,72 @@ +/**
+ * Compiler Header File
+ *
+ * @file compiler.h
+ *
+ * @defgroup doc_driver_utils_compiler Compiler abstraction
+ *
+ * @brief This file contains the compiler abstraction layer and code utilities for 8-bit AVR. This module provides various abstraction layers and utilities to make code compatible between different compilers.
+ *
+ * @version Driver Version 1.0.0
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+
+#ifndef UTILS_COMPILER_H
+#define UTILS_COMPILER_H
+
+#if defined(__GNUC__)
+#include <avr/io.h>
+#include <avr/builtins.h>
+#if defined(__XC8__)
+#include <xc.h>
+#endif
+#elif defined(__ICCAVR__)
+#define ENABLE_BIT_DEFINITIONS 1
+#include <ioavr.h>
+#include <intrinsics.h>
+
+#ifndef CCP_IOREG_gc
+#define CCP_IOREG_gc 0xD8 /* CPU_CCP_IOREG_gc */
+#endif
+#ifndef CCP_SPM_gc
+#define CCP_SPM_gc 0x9D /* CPU_CCP_SPM_gc */
+#endif
+
+#else
+#error Unsupported compiler.
+#endif
+
+#include <stdbool.h>
+#include <stdint.h>
+#include <stddef.h>
+#include <stdlib.h>
+
+#include "interrupt_avr8.h"
+
+/**
+ * @def UNUSED
+ * @brief Marking \a v as a unused parameter or value.
+ */
+#define UNUSED(v) (void)(v)
+
+#endif /* UTILS_COMPILER_H */
diff --git a/mcc_generated_files/system/utils/interrupt_avr8.h b/mcc_generated_files/system/utils/interrupt_avr8.h new file mode 100644 index 0000000..f5a21bb --- /dev/null +++ b/mcc_generated_files/system/utils/interrupt_avr8.h @@ -0,0 +1,88 @@ +/**
+ * interrupt_avr8 Header File
+ *
+ * @file interrupt_avr8.h
+ *
+ * @defgroup doc_driver_utils_interrupts ISR abstraction
+ *
+ * @brief Interrupt-related functionality.
+ *
+ * @version Driver Version 1.0.0
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+#ifndef UTILS_INTERRUPT_AVR8_H
+#define UTILS_INTERRUPT_AVR8_H
+
+/**
+ * \weakgroup interrupt_group
+ *
+ * @{
+ */
+
+#ifdef ISR_CUSTOM_H
+#include ISR_CUSTOM_H
+#else
+
+/**
+ * @def ISR
+ * @brief Define service routine for specified interrupt vector.
+ * @code
+ ISR(FOO_vect)
+ {
+ ...
+ }
+ * @endcode
+ *
+ * @param vect Interrupt vector name as found in the device header files.
+ */
+#if defined(__DOXYGEN__)
+#define ISR(vect)
+#elif defined(__GNUC__)
+#include <avr/interrupt.h>
+#elif defined(__ICCAVR__)
+#define __ISR(x) _Pragma(#x)
+#define ISR(vect) __ISR(vector = vect) __interrupt void handler_##vect(void)
+#endif
+#endif // ISR_CUSTOM_H
+
+#ifdef __GNUC__
+#define cpu_irq_enable() sei()
+#define cpu_irq_disable() cli()
+#else
+#define cpu_irq_enable() __enable_interrupt()
+#define cpu_irq_disable() __disable_interrupt()
+#endif
+
+//! @}
+
+/**
+ * \weakgroup interrupt_deprecated_group
+ * @{
+ */
+// Deprecated definitions.
+#define Enable_global_interrupt() cpu_irq_enable()
+#define Disable_global_interrupt() cpu_irq_disable()
+#define Is_global_interrupt_enabled() cpu_irq_is_enabled()
+//! @}
+
+#endif /* UTILS_INTERRUPT_AVR8_H */
diff --git a/mcc_generated_files/system/utils/utils.h b/mcc_generated_files/system/utils/utils.h new file mode 100644 index 0000000..37d3756 --- /dev/null +++ b/mcc_generated_files/system/utils/utils.h @@ -0,0 +1,52 @@ +/**
+ * utils Header File
+ *
+ * @file system.h
+ *
+ * @defgroup doc_driver_utils AVR Code utility functions
+ *
+ * @brief This file contains the compiler abstraction layer and code utilities for AVR.This module provides various abstraction layers and utilities to make code compatible between different compilers.
+ *
+ * @version Driver Version 1.0.1
+ * \{
+ *
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+#ifndef UTILS_H_INCLUDED
+#define UTILS_H_INCLUDED
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Retrieve array size
+ */
+#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* UTILS_H_INCLUDED */
diff --git a/mcc_generated_files/system/utils/utils_assert.h b/mcc_generated_files/system/utils/utils_assert.h new file mode 100644 index 0000000..891d017 --- /dev/null +++ b/mcc_generated_files/system/utils/utils_assert.h @@ -0,0 +1,60 @@ +/**
+ * utils_assert Header File
+ *
+ * @file utils_assert.h
+ *
+ * @defgroup doc_driver_utils_assert Functionality for assert
+ *
+ * @brief This file contains the generated utils_assert header file for the configuration bits driver.
+ *
+ * @version Driver Version 1.0.1
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+#ifndef _ASSERT_H_INCLUDED
+#define _ASSERT_H_INCLUDED
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdbool.h>
+
+/**
+ * @brief Assert macro
+ * Macro used to throw asserts. It can be mapped to different function based on debug level.
+ * @param[in] condition A condition to be checked; assert is thrown if the given condition is false.
+ */
+
+#ifdef DEBUG
+#define ASSERT(condition) \
+ if (!(condition)) \
+ while (true) \
+ ;
+#else
+#define ASSERT(condition) ((void)0)
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _ASSERT_H_INCLUDED */
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