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authorJoshua Drake <joshua.ellis.drake@gmail.com>2025-12-06 14:22:21 -0600
committerJoshua Drake <joshua.ellis.drake@gmail.com>2025-12-06 14:22:21 -0600
commitc9335332df86fbc895a8868a34abcc98817d53f0 (patch)
treeefd0443368c077cbe6215908ae91bf076625e107 /mcc_generated_files/system/src/protected_io.S
Inital CommitHEADmaster
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+/**
+ * protected_io Source Code File
+ *
+ * @file protected_io.S
+ *
+ * @ingroup config_bitsdriver
+ *
+ * @brief This file contains the generated protected_io source code file for the CONFIGURATION BITS.
+ *
+ * @version Driver Version 1.0.0
+*/
+/*
+© [2025] Microchip Technology Inc. and its subsidiaries.
+
+ Subject to your compliance with these terms, you may use Microchip
+ software and any derivatives exclusively with Microchip products.
+ You are responsible for complying with 3rd party license terms
+ applicable to your use of 3rd party software (including open source
+ software) that may accompany Microchip software. SOFTWARE IS ?AS IS.?
+ NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS
+ SOFTWARE, INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT,
+ MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
+ WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
+ INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY
+ KIND WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF
+ MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE
+ FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP?S
+ TOTAL LIABILITY ON ALL CLAIMS RELATED TO THE SOFTWARE WILL NOT
+ EXCEED AMOUNT OF FEES, IF ANY, YOU PAID DIRECTLY TO MICROCHIP FOR
+ THIS SOFTWARE.
+*/
+
+
+#include "../utils/assembler.h"
+
+/*
+ * GNU and IAR use different calling conventions. Since this is
+ * a very small and simple function to begin with, it's easier
+ * to implement it twice than to deal with the differences
+ * within a single implementation.
+ */
+
+ PUBLIC_FUNCTION(protected_write_io)
+
+#if defined(__GNUC__)
+
+#ifdef RAMPZ
+ out _SFR_IO_ADDR(RAMPZ), r1 // Clear bits 23:16 of Z
+#endif
+ movw r30, r24 // Load addr into Z
+ out CCP, r22 // Start CCP handshake
+ st Z, r20 // Write value to I/O register
+ ret // Return to caller
+
+#elif defined(__IAR_SYSTEMS_ASM__)
+
+# if !defined(CONFIG_MEMORY_MODEL_TINY) && !defined(CONFIG_MEMORY_MODEL_SMALL) \
+ && !defined(CONFIG_MEMORY_MODEL_LARGE)
+# define CONFIG_MEMORY_MODEL_SMALL
+# endif
+# if defined(CONFIG_MEMORY_MODEL_LARGE)
+ ldi r20, 0
+ out RAMPZ, r20 // Reset bits 23:16 of Z
+ movw r30, r16 // Load addr into Z
+# elif defined(CONFIG_MEMORY_MODEL_TINY)
+ ldi r31, 0 // Reset bits 8:15 of Z
+ mov r30, r16 // Load addr into Z
+# else
+ movw r30, r16 // Load addr into Z
+# endif
+# if defined(CONFIG_MEMORY_MODEL_TINY)
+ out CCP, r17 // Start CCP handshake
+ st Z, r18 // Write value to I/O register
+# elif defined(CONFIG_MEMORY_MODEL_SMALL)
+ out CCP, r18 // Start CCP handshake
+ st Z, r19 // Write value to I/O register
+# elif defined(CONFIG_MEMORY_MODEL_LARGE)
+ out CCP, r19 // Start CCP handshake
+ st Z, r20 // Write value to I/O register
+# else
+# error Unknown memory model in use, no idea how registers should be accessed
+# endif
+ ret
+#else
+# error Unknown assembler
+#endif
+
+ END_FUNC(protected_write_io)
+ END_FILE()
+